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Aminul Islam 0002
Person information
- affiliation: Birla Institute of Technology, Department of Electronics and Communication, India
Other persons with the same name
- Aminul Islam — disambiguation page
- Aminul Islam 0001 — University of Louisiana at Lafayette, LA, USA (and 2 more)
- Aminul Islam 0003
— Technical University of Denmark, Lyngby, Denmark
- Aminul Islam 0004 — Wayne State University, Department of Computer Science, USA
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2020 – today
- 2023
- [j19]Soumak Nandi
Design and Investigation of a Metamorphic InAs Channel Inset InP HEMT for Cryogenic Low-Noise Amplifiers. IEEE Access 11: 133115-133130 (2023) - 2021
- [j18]Soumitra Pal
Radiation-hardened read-decoupled low-power 12T SRAM for space applications. Int. J. Circuit Theory Appl. 49(11): 3583-3596 (2021) - [j17]Soumitra Pal
Design of Soft-Error-Aware SRAM With Multi-Node Upset Recovery for Aerospace Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 68(6): 2470-2480 (2021) - [j16]Soumitra Pal
Soft-Error-Immune Read-Stability-Improved SRAM for Multi-Node Upset Tolerance in Space Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 68(8): 3317-3327 (2021) - [j15]Soumitra Pal
Highly Stable Low Power Radiation Hardened Memory-by-Design SRAM for Space Applications. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 2147-2151 (2021) - [j14]Soumitra Pal
Soft-Error-Aware Read-Decoupled SRAM With Multi-Node Recovery for Aerospace Applications. IEEE Trans. Circuits Syst. II Express Briefs 68(10): 3336-3340 (2021) - 2020
- [j13]Soumitra Pal, Subhankar Bose, Wing-Hung Ki
Reliable write assist low power SRAM cell for wireless sensor network applications. IET Circuits Devices Syst. 14(2): 137-147 (2020) - [j12]Amresh Kumar, Amit Krishna Dwivedi, Aminul Islam
Variation resilient reliable design of trigger pulse generator. IET Circuits Devices Syst. 14(6): 860-868 (2020)
2010 – 2019
- 2019
- [j11]Soumitra Pal, Vivek Gupta, Wing-Hung Ki
Design and development of memristor-based RRAM. IET Circuits Devices Syst. 13(4): 548-557 (2019) - [j10]Soumitra Pal, Vivek Gupta, Wing-Hung Ki
Transmission gate-based 9T SRAM cell for variation resilient low power and reliable internet of things applications. IET Circuits Devices Syst. 13(5): 584-595 (2019) - [j9]Soumitra Pal
Design of CNFET based power- and variability-aware nonvolatile RRAM cell. Microelectron. J. 86: 7-14 (2019) - 2018
- [j8]Rishab Mehra
Reliable and Q-Enhanced Floating Active Inductors and Their Application in RF Bandpass Filters. IEEE Access 6: 48181-48194 (2018) - [c8]Srinithya Nagiri, Sananya Majumder, Riya, Aminul Islam
Design of low power RRAM cell using CNFET. RAIT 2018: 1-5 - 2017
- [j7]Rishab Mehra
Variation-aware widely tunable nanoscale design of CMOS active inductor-based RF bandpass filter. Int. J. Circuit Theory Appl. 45(12): 2181-2200 (2017) - [c7]Nikita Gupta, Pragati Thakur, Shashank Kumar Dubey
Design of nonvolatile MRAM bitcell. ISED 2017: 1-4 - [c6]Alisha Oraon, Shradha Shreya, Renuka Kumari, Aminul Islam
A double trench 4H - SiC MOSFET as an enhanced model of SiC UMOSFET. ISED 2017: 1-5 - 2016
- [j6]Amit Krishna Dwivedi, Aminul Islam
Design of magnetic tunnel junction-based tunable spin torque oscillator at nanoscale regime. IET Circuits Devices Syst. 10(2): 121-129 (2016) - [j5]Soumitra Pal
Variation Tolerant Differential 8T SRAM Cell for Ultralow Power Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(4): 549-558 (2016) - [c5]Manisha Guduri
Investigation on electrical characteristics of FDSOI device for ultra-low power operation. RAIT 2016: 534-536 - 2015
- [j4]Vishesh Dokania
Circuit-level design technique to mitigate impact of process, voltage and temperature variations in complementary metal-oxide semiconductor full adder cells. IET Circuits Devices Syst. 9(3): 204-212 (2015) - [c4]Chandaramauleshwar Roy, Aminul Islam
Comparative analysis of various 9T SRAM cell at 22-nm technology node. ReTIS 2015: 491-496 - [c3]Aminul Islam
Technology scaling and its side effects. VDAT 2015: 1 - 2014
- [j3]Arundhati Bhattacharya, Aminul Islam
Design and Analysis of Robust Spin Transfer Torque Magnetic Random Access Memory Bitcell Using FinFET. J. Low Power Electron. 10(2): 220-227 (2014) - 2012
- [j2]Aminul Islam
A technique to mitigate impact of process, voltage and temperature variations on design metrics of SRAM Cell. Microelectron. Reliab. 52(2): 405-411 (2012) - [j1]Aminul Islam
Variability aware low leakage reliable SRAM cell design technique. Microelectron. Reliab. 52(6): 1247-1252 (2012) - 2011
- [c2]Aminul Islam
Low Active Power High Speed Cache Design. ISED 2011: 254-259 - 2010
- [c1]Aminul Islam
High Speed Cache Design Using Multi-diameter CNFET at 32nm Technology. ICT 2010: 215-222
Coauthor Index
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