default search action
Juan Lanchares
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
- [i4]José L. Risco-Martín, J. Manuel Colmenar, José Ignacio Hidalgo, Juan Lanchares, Josefa Díaz:
A methodology to automatically optimize dynamic memory managers applying grammatical evolution. CoRR abs/2403.04414 (2024) - [i3]Juan Lanchares, Oscar Garnica, José L. Risco-Martín, José Ignacio Hidalgo, J. Manuel Colmenar, Alfredo Cuesta-Infante:
Real Time Evolvable Hardware for Optimal Reconfiguration of Cusp-Like Pulse Shapers. CoRR abs/2404.11592 (2024) - 2023
- [c50]Jorge Cano
, José Ignacio Hidalgo
Hardware design of a model generator based on grammars and cartesian genetic programming for blood glucose prediction. GECCO Companion 2023: 55-56 - [i2]Josefa Díaz Álvarez, J. Manuel Colmenar, José L. Risco-Martín, Juan Lanchares, Oscar Garnica:
Optimizing L1 cache for embedded systems through grammatical evolution. CoRR abs/2303.03338 (2023) - 2021
- [j20]Felix Tena
Ensemble Models of Cutting-Edge Deep Neural Networks for Blood Glucose Prediction in Patients with Diabetes. Sensors 21(21): 7090 (2021) - [i1]Felix Tena, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo:
A Critical Review of the state-of-the-art on Deep Neural Networks for Blood Glucose Prediction in Patients with Diabetes. CoRR abs/2109.02178 (2021) - 2020
- [j19]José Ignacio Hidalgo
Glucose forecasting combining Markov chain based enrichment of data, random grammatical evolution and Bagging. Appl. Soft Comput. 88: 105923 (2020) - [j18]Oscar Garnica
Noise spectral analysis and error estimation of continuous glucose monitors under real-life conditions of diabetes patients. Biomed. Signal Process. Control. 61: 101934 (2020) - [j17]Oscar Garnica
Optimal Runtime Algorithm to Improve Fault Tolerance of Bus-Based Reconfigurable Designs. IEEE Trans. Very Large Scale Integr. Syst. 28(4): 914-925 (2020)
2010 – 2019
- 2019
- [c49]José Ignacio Hidalgo, Ricardo Fernández
Determination of microscopic residual stresses using diffraction methods, EBSD maps, and evolutionary algorithms. GECCO (Companion) 2019: 53-54 - [c48]Sergio Contador
Can clustering improve glucose forecasting with genetic programming models? GECCO (Companion) 2019: 1829-1836 - [c47]José Ignacio Hidalgo, Ricardo Fernández
Determination of microscopic residual stresses using evolutionary algorithms. GECCO (Companion) 2019: 1964-1970 - 2018
- [j16]José Manuel Velasco
Combining data augmentation, EDAs and grammatical evolution for blood glucose forecasting. Memetic Comput. 10(3): 267-277 (2018) - [p3]José Ignacio Hidalgo, J. Manuel Colmenar, J. Manuel Velasco, Gabriel Kronberger, Stephan M. Winkler
Identification of Models for Glucose Blood Values in Diabetics by Grammatical Evolution. Handbook of Grammatical Evolution 2018: 367-393 - 2017
- [j15]José Ignacio Hidalgo
Data Based Prediction of Blood Glucose Concentrations Using Evolutionary Methods. J. Medical Syst. 41(9): 142 (2017) - [c46]José Manuel Velasco, Oscar Garnica
Data augmentation and evolutionary algorithms to improve the prediction of blood glucose levels in scarcity of training data. CEC 2017: 2193-2200 - [c45]José Manuel Velasco
Enhancing Grammatical Evolution Through Data Augmentation: Application to Blood Glucose Forecasting. EvoApplications (1) 2017: 142-157 - [c44]José Manuel Velasco, Oscar Garnica
Forecasting glucose levels in patients with diabetes mellitus using semantic grammatical evolution and symbolic aggregate approximation. GECCO (Companion) 2017: 1387-1394 - 2016
- [j14]Josefa Díaz Álvarez
Optimizing L1 cache for embedded systems through grammatical evolution. Soft Comput. 20(6): 2451-2465 (2016) - [c43]J. Manuel Colmenar, José Ignacio Hidalgo, Juan Lanchares, Oscar Garnica
Compilable Phenotypes: Speeding-Up the Evaluation of Glucose Models in Grammatical Evolution. EvoApplications (2) 2016: 118-133 - 2015
- [c42]J. Manuel Velasco
Data-Based Identification of Prediction Models for Glucose. GECCO (Companion) 2015: 1327-1334 - [c41]Josefa Díaz Álvarez
Optimizing Performance of L1 Cache Memory for Embedded Systems driven by Differential Evolution. GECCO (Companion) 2015: 1383-1384 - 2014
- [j13]José L. Risco-Martín
A methodology to automatically optimize dynamic memory managers applying grammatical evolution. J. Syst. Softw. 91: 109-123 (2014) - [c40]José Ignacio Hidalgo, J. Manuel Colmenar, José Luis Risco-Martín
Solving GA-hard problems with EMMRS and GPGPUs. GECCO 2014: 1007-1014 - [c39]José Ignacio Hidalgo, J. Manuel Colmenar, José Luis Risco-Martín
Clarke and parkes error grid analysis of diabetic glucose models obtained with evolutionary computation. GECCO (Companion) 2014: 1305-1312 - 2013
- [j12]Juan Lanchares, Oscar Garnica
A review of bioinspired computer-aided design tools for hardware design. Concurr. Comput. Pract. Exp. 25(8): 1015-1036 (2013) - 2012
- [j11]José L. Risco-Martín
Special issue on evolutionary computation on general purpose graphics processing units. Soft Comput. 16(2): 185-186 (2012) - [p2]Francisco Fernández de Vega, José Ignacio Hidalgo, Juan Lanchares:
Introduction. Parallel Architectures and Bioinspired Algorithms 2012: 1-6 - [e1]Francisco Fernández de Vega, José Ignacio Hidalgo Pérez
Parallel Architectures and Bioinspired Algorithms. Studies in Computational Intelligence 415, Springer 2012, ISBN 978-3-642-28788-6 [contents] - 2011
- [j10]Sonia López, Oscar Garnica
A phase adaptive cache hierarchy for SMT processors. Microprocess. Microsystems 35(8): 683-694 (2011) - 2010
- [j9]José Ignacio Hidalgo, Francisco Fernández, Juan Lanchares, Erick Cantú-Paz, Albert Y. Zomaya
Parallel Architectures and Bioinspired Algorithms. Parallel Comput. 36(10-11): 553-554 (2010) - [c38]Sonia López, Oscar Garnica
Adaptive Cache Memories for SMT Processors. DSD 2010: 331-338 - [c37]José Manuel Colmenar, José L. Risco-Martín
Improving reliability of embedded systems through dynamic memory manager optimization using grammatical evolution. GECCO 2010: 1227-1234 - [c36]J. Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo:
Simulating a LAGS processor to consider variable latency on L1 D-Cache. SummerSim 2010: 56-63 - [p1]José L. Risco-Martín
Parallel and Distributed Optimization of Dynamic Data Structures for Multimedia Embedded Systems. Parallel and Distributed Computational Intelligence 2010: 263-290
2000 – 2009
- 2009
- [j8]Christos Baloukas, José Luis Risco-Martín
Optimization methodology of dynamic data structures based on genetic algorithms for multimedia embedded systems. J. Syst. Softw. 82(4): 590-602 (2009) - [j7]José Manuel Colmenar
Characterizing asynchronous variable latencies through probability distribution functions. Microprocess. Microsystems 33(7-8): 483-497 (2009) - [c35]José Luis Risco-Martín
Mixed heuristic and mathematical programming using reference points for dynamic data types optimization in multimedia embedded systems. GECCO 2009: 1601-1608 - 2008
- [j6]José L. Risco-Martín
Particle swarm optimisation of memory usage in embedded systems. Int. J. High Perform. Syst. Archit. 1(4): 209-219 (2008) - [j5]José L. Risco-Martín
A parallel evolutionary algorithm to optimize dynamic data types in embedded systems. Soft Comput. 12(12): 1157-1167 (2008) - [c34]José Luis Risco-Martín
Design Flow of Dynamically-Allocated Data Types in Embedded Applications Based on Elitist Evolutionary Computation Optimization. DSD 2008: 455-463 - [c33]José L. Risco-Martín
Solving discrete deceptive problems with EMMRS. GECCO 2008: 1139-1140 - [c32]José Ignacio Hidalgo, José L. Risco-Martín, David Atienza, Juan Lanchares:
Analysis of multi-objective evolutionary algorithms to optimize dynamic data types in embedded systems. GECCO 2008: 1515-1522 - [c31]José L. Risco-Martín
Optimization of dynamic data types in embedded systems using DEVS/SOA-based modeling and simulation. Infoscale 2008: 17 - [c30]José Manuel Colmenar, Noelia Morón, Oscar Garnica
Modelling Asynchronous Systems using Probability Distribution Functions. PDP 2008: 3-11 - 2007
- [j4]Guadalupe Miñana, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar
Reducing power of functional units in high-performance processors by checking instruction codes and resizing adders. IET Comput. Digit. Tech. 1(2): 113-119 (2007) - [c29]Sonia López, Steven G. Dropsho, David H. Albonesi, Oscar Garnica, Juan Lanchares:
Rate-Driven Control of Resizable Caches for Highly Threaded SMT Processors. PACT 2007: 416 - [c28]José Ignacio Hidalgo, Francisco Fernández de Vega, Juan Lanchares, Daniel Lombraña Gonzalez:
Is the island model fault tolerant? GECCO 2007: 1519 - [c27]José Ignacio Hidalgo
Is the island model fault tolerant? GECCO (Companion) 2007: 2737-2744 - [c26]Sonia López, Steve Dropsho, David H. Albonesi, Oscar Garnica
Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches. HiPEAC 2007: 136-150 - [c25]David Atienza, Christos Baloukas, Lazaros Papadopoulos, Christophe Poucet, Stylianos Mamagkakis, José Ignacio Hidalgo
Optimization of dynamic data structures in multimedia embedded systems using evolutionary computation. SCOPES 2007: 31-40 - 2006
- [c24]José Manuel Colmenar, Oscar Garnica
Comparing the Performance of a 64-bit Fully-Asynchronous Superscalar Processor versus its Synchronous Counterpart. DSD 2006: 423-432 - [c23]Guadalupe Miñana, Oscar Garnica
A Power-Aware Technique for Functional Units in High-Performance Processors. DSD 2006: 456-459 - [c22]José Manuel Colmenar, Oscar Garnica
Sim-async: An Architectural Simulator for Asynchronous Processor Modeling Using Distribution Functions. Euro-Par 2006: 495-505 - [c21]Guadalupe Miñana, José Ignacio Hidalgo, Oscar Garnica
A Technique to Reduce Static and Dynamic Power of Functional Units in High-Performance Processors. PATMOS 2006: 514-523 - 2005
- [c20]Guadalupe Miñana, Oscar Garnica
Power Reduction of Superscalar Processor Functional Units by Resizing Adder-Width. PATMOS 2005: 40-48 - 2004
- [j3]Francisco Fernández, José Ignacio Hidalgo
A methodology for reconfigurable hardware design based upon evolutionary computation. Microprocess. Microsystems 28(7): 363-371 (2004) - [j2]Juan de Vicente
Annealing placement by thermodynamic combinatorial optimization. ACM Trans. Design Autom. Electr. Syst. 9(3): 310-332 (2004) - [c19]José Manuel Colmenar, Oscar Garnica
Empirical Characterization of the Latency of Long Asynchronous Pipelines with Data-Dependent Module Delays. PDP 2004: 112-119 - 2003
- [c18]José Ignacio Hidalgo, Francisco Fernández, Juan Lanchares, Juan Manuel Sánchez-Pérez, Román Hermida, Marco Tomassini, Ranieri Baraglia, Raffaele Perego
Multi-FPGA Systems Synthesis by Means of Evolutionary Computation. GECCO 2003: 2109-2120 - [c17]Sonia López, Oscar Garnica
Power-Consumption RRRRreduction in Asynchronous Circuits Using Delay Path Unequalization. PATMOS 2003: 151-160 - [c16]José Ignacio Hidalgo, Manuel Prieto
Hybrid Parallelization of a Compact Genetic Algorithm. PDP 2003: 449-455 - 2002
- [j1]Oscar Garnica, Juan Lanchares, Román Hermida:
Optimization of Asynchronous Delay-Insensitive Pipeline Latency Using Stage Reorganization and Optimal Stage Parameter Estimation. Fundam. Informaticae 50(2): 155-174 (2002) - [c15]Juan de Vicente
FPGA Placement by Thermodynamic Combinatorial Optimization. DATE 2002: 54-60 - [c14]José Ignacio Hidalgo, Juan Lanchares, Aitor Ibarra
A Hybrid Evolutionary Algorithm for Multi-FPGA Systems Design. DSD 2002: 60-69 - [c13]Aitor Ibarra
Optimization of Equational Specifications Using Genetic Techniques. DSD 2002: 252-258 - [c12]Aitor Ibarra, Juan Lanchares, Jose Manuel Mendias, José Ignacio Hidalgo, Román Hermida:
Transformation of Equational Specification by Means of Genetic Programming. EuroGP 2002: 248-257 - [c11]Oscar Garnica
A New Methodology to Design Low-Power Asynchronous Circuits. PATMOS 2002: 108-117 - 2001
- [c10]Oscar Garnica
Optimization of Asynchronous Delay-Insensitive Pipeline Latency Using Stage Reorganization and Optimal Stage Parameter Estimation. ACSD 2001: 167-178 - [c9]Oscar Garnica
A pseudo delay-insensitive timing model to synthesizing low-power asynchronous circuits. DATE 2001: 810 - [c8]Aitor Ibarra
Pipelined Genetic Architecture with Fitness on the Fly. DSD 2001: 382-385 - [c7]Ranieri Baraglia, Raffaele Perego
A Parallel Compact Genetic Algorithm for Multi-FPGA Partitioning. PDP 2001: 113-120 - 2000
- [c6]José Ignacio Hidalgo, Juan Lanchares, Román Hermida
Partitioning and Placement for Multi-FPGA Systems Using Genetic Algorithms. EUROMICRO 2000: 1204-1211 - [c5]Juan de Vicente
Adaptive FPGA Placement by Natural Optimization. IEEE International Workshop on Rapid System Prototyping 2000: 188-193
1990 – 1999
- 1999
- [c4]Juan de Vicente
Placement Optimization Based on Global Routing Updating for System Partitioning onto Multi-FPGA Mesh Topologies. FPL 1999: 91-100 - [c3]José Ignacio Hidalgo, Manuel Prieto
A Method for Model Parameter Identification Using Parallel Genetic Algorithms. PVM/MPI 1999: 291-298 - 1998
- [c2]Juan de Vicente
RSR: A New Rectilinear Steiner Minimum Tree Approximation for FPGA Placement and Global Routing. EUROMICRO 1998: 10192-10195 - 1997
- [c1]José Ignacio Hidalgo, Juan Lanchares:
Functional Partitioning for Hardware-Software Codesign using Genetic Algorithms. EUROMICRO 1997: 631-638
Coauthor Index
José Manuel Colmenar
aka: J. Manuel Colmenar
aka: J. Manuel Colmenar
José Ignacio Hidalgo
aka: José Ignacio Hidalgo Pérez
aka: José Ignacio Hidalgo Pérez
[i4] [i3] [c50] [j20] [i1] [j19] [j18] [j17] [c49] [c48] [c47] [j16] [p3] [j15] [c46] [c45] [c44] [c43] [c42] [j13] [c40] [c39] [j12] [p2] [e1] [j10] [j9] [c38] [c37] [c36] [p1] [j8] [j7] [c35] [j6] [j5] [c34] [c33] [c32] [c31] [c30] [j4] [c28] [c27] [c25] [c24] [c23] [c22] [c21] [c20] [j3] [c19] [c18] [c17] [c16] [c14] [c13] [c12] [c8] [c7] [c6] [c3] [c1]
José Luis Risco-Martín
aka: José L. Risco-Martín
aka: José L. Risco-Martín
José Manuel Velasco
aka: J. Manuel Velasco
aka: J. Manuel Velasco
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2025-01-21 00:06 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: