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Ke Chen 0018
Person information
- affiliation: Northeastern University, Department of Electrical and Computer Engineering, Boston, MA, USA
Other persons with the same name
- Ke Chen — disambiguation page
- Ke Chen 0001
— University of Manchester, Department of Computer Science, Manchester, UK (and 1 more)
- Ke Chen 0002
- Ke Chen 0003
- Ke Chen 0004
- Ke Chen 0005
- Ke Chen 0006 — Google (and 1 more)
- Ke Chen 0007 — University Perpignan
- Ke Chen 0008 — Xihua University, School of Computer and Software Engineering, Chengdu, China
- Ke Chen 0009 — Shanghai University of Engineering Science, College of Electronic and Electrical Engineering, China
- Ke Chen 0011
- Ke Chen 0012
- Ke Chen 0013
- Ke Chen 0014
- Ke Chen 0015
- Ke Chen 0016
- Ke Chen 0017
- Ke Chen 0019
- Ke Chen 0020 — University of Notre Dame, IN, USA
- Ke Chen 0021
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2020 – today
- 2024
- [j19]Tianyang Yu
Fully Learnable Hyperdimensional Computing Framework With Ultratiny Accelerator for Edge-Side Applications. IEEE Trans. Computers 73(2): 574-585 (2024) - [j18]Bi Wu
Edge-Side Fine-Grained Sparse CNN Accelerator With Efficient Dynamic Pruning Scheme. IEEE Trans. Circuits Syst. I Regul. Pap. 71(3): 1285-1298 (2024) - [j17]Haonan Zhu
A Potential Enabler for High-Performance In-Memory Multi-Bit Arithmetic Schemes With Unipolar Switching SOT-MRAM. IEEE Trans. Circuits Syst. I Regul. Pap. 71(7): 3165-3178 (2024) - [j16]Tianyang Yu
Toward Efficient Retraining: A Large-Scale Approximate Neural Network Framework With Cross-Layer Optimization. IEEE Trans. Very Large Scale Integr. Syst. 32(6): 1004-1017 (2024) - [j15]Xian Shi, Lile Cai, Ke Chen
Label-Efficient Point Cloud Semantic Segmentation: A Holistic Active Learning Approach. World Sci. Annu. Rev. Artif. Intell. 2: 2440006:1-2440006:29 (2024) - [c19]Ziying Cui, Ke Chen, Bi Wu, Chenggang Yan, Yu Gong, Weiqiang Liu:
A Time Efficient Comprehensive Model of Approximate Multipliers for Design Space Exploration. ARITH 2024: 116-123 - [c18]Bin Gong, Ke Chen, Pengfei Huang, Bi Wu, Weiqiang Liu:
Most Significant One-Driven Shifting Dynamic Efficient Multipliers for Large Language Models. ISCAS 2024: 1-5 - [c17]Shouji Chen, Ke Chen, Ziying Cui, Weiqiang Liu:
A High-accuracy Time-efficient Error Metric Model for Approximate Computing Circuits. ISVLSI 2024: 94-99 - 2023
- [j14]Chenggang Yan
Hardware Efficient Successive-Cancellation Polar Decoders Using Approximate Computing. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(1): 189-200 (2023) - [j13]Ke Chen
Exact and Approximate Squarers for Error-Tolerant Applications. IEEE Trans. Computers 72(7): 2120-2126 (2023) - [j12]Bi Wu
MLiM: High-Performance Magnetic Logic in-Memory Scheme With Unipolar Switching SOT-MRAM. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2412-2424 (2023) - [j11]Bi Wu
An Energy-Efficient Computing-in-Memory (CiM) Scheme Using Field-Free Spin-Orbit Torque (SOT) Magnetic RAMs. IEEE Trans. Emerg. Top. Comput. 11(2): 331-342 (2023) - [j10]Ke Chen
Approximate Softmax Functions for Energy-Efficient Deep Neural Networks. IEEE Trans. Very Large Scale Integr. Syst. 31(1): 4-16 (2023) - [c16]Xu Wang, Ke Chen, Chenghua Wang, Weiqiang Liu:
An Energy-efficient Approximate DCT Design for Image Processing (Invited). ASICON 2023: 1-4 - [c15]Haonan Wang, Ke Chen, Chenggang Yan, Bi Wu, Weiqiang Liu:
Hardware-Efficient Accurate and Approximate FPGA Multipliers for Error-Tolerant Applications. MWSCAS 2023: 977-981 - [c14]Wenzhuo Xie, Chenggang Yan, Hanghang Wang, Ke Chen, Bi Wu, Chenghua Wang, Weiqiang Liu:
A High Accuracy and Hardware Efficient Adaptive Filter Design with Approximate Computing. MWSCAS 2023: 982-986 - [c13]Shuo Ran
VLCP: A High-Performance FPGA-based CNN Accelerator with Vector-level Cluster Pruning. NANOARCH 2023: 33:1-33:6 - 2022
- [j9]Ke Chen, Peipei Yin, Weiqiang Liu, Fabrizio Lombardi:
A survey of approximate arithmetic circuits and blocks. it Inf. Technol. 64(3): 79-87 (2022) - [j8]Shanshan Liu, Bi Wu
Editorial Special Issue on Circuits and Systems for Emerging Computing Paradigms. IEEE Trans. Circuits Syst. I Regul. Pap. 69(7): 2653-2654 (2022) - [j7]Bi Wu
GBC: An Energy-Efficient LSTM Accelerator With Gating Units Level Balanced Compression Strategy. IEEE Trans. Circuits Syst. I Regul. Pap. 69(9): 3655-3665 (2022) - [c12]Jipeng Ge, Chenggang Yan, Xuan Zhao, Ke Chen, Bi Wu, Weiqiang Liu:
An Energy-Efficient Approximate Floating-Point Multipliers for Wireless Communications. APCCAS 2022: 1-5 - [c11]Pengfei Huang, Chenghua Wang, Ke Chen, Weiqiang Liu:
PAxC: A Probabilistic-oriented Approximate Computing Methodology for ANNs. DATE 2022: 1165-1168 - [c10]Tianyang Yu
Data Stream Oriented Fine-grained Sparse CNN Accelerator with Efficient Unstructured Pruning Strategy. ACM Great Lakes Symposium on VLSI 2022: 243-248 - [c9]Ziying Cui, Ke Chen, Bi Wu, Chenggang Yan, Weiqiang Liu:
An Energy-efficient and High-precision Approximate MAC with Distributed Arithmetic Circuits. ACM Great Lakes Symposium on VLSI 2022: 315-318 - [c8]Tianyang Yu
Energy-efficient Oriented Approximate Quantization Scheme for Fine-Grained Sparse Neural Network Acceleration. ICCD 2022: 762-769 - [c7]Hanghang Wang
HEADiv: A High-accuracy Energy-efficient Approximate Divider with Error Compensation. NANOARCH 2022: 15:1-15:6 - [p1]Ke Chen, Weiqiang Liu, Fabrizio Lombardi:
Approximate Arithmetic Circuits: Design and Applications. Approximate Computing 2022: 3-21 - 2021
- [j6]Shanshan Liu, Ke Chen
Reduced Precision Redundancy for Reliable Processing of Data. IEEE Trans. Emerg. Top. Comput. 9(4): 1960-1971 (2021) - [c6]Jinhe Du, Ke Chen, Peipei Yin, Chenggang Yan, Weiqiang Liu:
Design of An Approximate FFT Processor Based on Approximate Complex Multipliers. ISVLSI 2021: 308-313 - 2020
- [j5]Ke Chen
Profile-Based Output Error Compensation for Approximate Arithmetic Circuits. IEEE Trans. Circuits Syst. 67-I(12): 4707-4718 (2020)
2010 – 2019
- 2019
- [j4]Ke Chen
Efficient Implementations of Reduced Precision Redundancy (RPR) Multiply and Accumulate (MAC). IEEE Trans. Computers 68(5): 784-790 (2019) - 2018
- [c5]Ke Chen, Jie Han, Paolo Montuschi, Weiqiang Liu, Fabrizio Lombardi:
Design and Application of an Approximate 2-D Convolver with Error Compensation. ISCAS 2018: 1-5 - 2017
- [j3]Ke Chen, Jie Han, Fabrizio Lombardi
Two Approximate Voting Schemes for Reliable Computing. IEEE Trans. Computers 66(7): 1227-1239 (2017) - [c4]Ke Chen, Fabrizio Lombardi, Jie Han:
Partially universal modules for high performance logic circuit design. MWSCAS 2017: 108-111 - 2016
- [c3]Ke Chen, Fabrizio Lombardi, Jie Han:
Design and analysis of an approximate 2D convolver. DFT 2016: 31-34 - 2015
- [j2]Ke Chen, Jie Han, Fabrizio Lombardi:
On the Nonvolatile Performance of Flip-Flop/SRAM Cells With a Single MTJ. IEEE Trans. Very Large Scale Integr. Syst. 23(6): 1160-1164 (2015) - [j1]Ke Chen, Jie Han, Fabrizio Lombardi:
On the Restore Operation in MTJ-Based Nonvolatile SRAM Cells. IEEE Trans. Very Large Scale Integr. Syst. 23(11): 2695-2699 (2015) - [c2]Ke Chen, Fabrizio Lombardi, Jie Han:
An approximate voting scheme for reliable computing. DATE 2015: 293-296 - [c1]Ke Chen, Fabrizio Lombardi, Jie Han:
Matrix multiplication by an inexact systolic array. NANOARCH 2015: 151-156
Coauthor Index
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last updated on 2024-11-27 21:23 CET by the dblp team
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