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Hui Wang 0004
Person information
- affiliation: Tsinghua University, Department of Electronic Engineering, TNList, Beijing, China
- not to be confused with: Hui Wang 0011
Other persons with the same name
- Hui Wang — disambiguation page
- Hui Wang 0001
— Queen's University Belfast, UK (and 1 more)
- Hui Wang 0002
- Hui Wang 0003 — Brown University
- Hui Wang 0005 — University of Southern California
- Hui Wang 0006 — Pohang University of Science and Technology, Korea
- Hui Wang 0007 — Affymetrix, Inc.
- Hui Wang 0008 — University of Minnesota
- Hui Wang 0009 — National University of Singapore
- Hui Wang 0010 — University of Queensland
- Hui Wang 0011
- Hui Wang 0012 — Shanghai Jiao Tong University, Institute of Image Processing and Pattern Recognition, China
- Wendy Hui Wang (aka: Hui Wang 0013) — Stevens Institute of Technology, Hoboken, NJ, USA
- Hui Wang 0014 — Rice University, Houston, TX, USA
- Hui Wang 0015
- Hui Wang 0016
- Hui Wang 0017
- Hui Wang 0018
- Hui Wang 0019 — Zhejiang University, Department of Biosystems Engineering, China
- Hui Wang 0020
- Hui Wang 0021
- Hui Wang 0022
- Hui Wang 0023
- Hui Wang 0024 — Yanshan University, College of Electrical Engineering, Qinhuangdao, China
- Hui Wang 0025
- Hui Wang 0026
- Hui Wang 0027
- Hui Wang 0028
- Hui Wang 0029
- Hui Wang 0030 — National University of Defense Technology, College of Systems Engineering, Changsha, China (and 1 more)
- Hui Wang 0031
- Hui Wang 0032
- Hui Wang 0033
- Hui Wang 0034
- Hui Wang 0035
- Hui Wang 0036 — Chinese Academy of Sciences, Shanghai Advanced Research Institute, China (and 1 more)
- Hui Wang 0037 — Shanghai Jiao Tong University, Department of Computer Science and Engineering, Lab. of Cryptology and Computer Security, China
- Hui Wang 0038 — Radford University, Department of Information Technology, VA, USA (and 1 more)
- Hui Wang 0039
- Hui Wang 0040
- Hui Wang 0041
- Hui Wang 0042
- Hui Wang 0043
- Hui Wang 0044
- Hui Wang 0045
- Hui Wang 0046
- Hui Wang 0047
- Hui Wang 0048
- Hui Wang 0049 — Southern University of Science and Technology, Department of Electrical and Electronic Engineering, Shenzhen, China
- Hui Wang 0050 — Chongqing University, College of Computer Science, MoE Key Laboratory of Dependable Service Computing in Cyber Physical Society, China
- Hui Wang 0051
- Hui Wang 0052
- Hui Wang 0053
- Hui Wang 0054 — University of Aizu, School of Computer Science and Engineering, Biomedical Information Technology Laboratory, Aizuwakamatsu, Japan
- Hui Wang 0055
- Hui Wang 0056
- Hui Wang 0057
- Hui Wang 0058
- Hui Wang 0059
- Hui Wang 0060
- Hui Wang 0061
- Hui Wang 0062
- Hui Wang 0063
- Hui Wang 0064
- Hui Wang 0065
- Hui Wang 0066
- Hui Wang 0067
- Hui Wang 0068 — York University, Department of Computer Science and Engineering, Toronto, Canada
- Hui Wang 0069
- Hui Wang 0070 — Communication University of China, School of Information Engineering, Beijing, China
- Hui Wang 0071
- Hui Wang 0072
- Hui Wang 0073 — Pengcheng Laboratory, Shenzhen, China (and 1 more)
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2010 – 2019
- 2019
- [j16]Wei Zhou, Hong Zhang, Hui Wang, Yu Wang:
Designing scrubbing strategy for memories suffering MCUs through the selection of optimal interleaving distance. Int. J. Comput. Sci. Eng. 19(1): 53-63 (2019) - 2014
- [j15]Xueqing Li, Qi Wei, Zhen Xu, Jianan Liu, Hui Wang
A 14 Bit 500 MS/s CMOS DAC Using Complementary Switched Current Sources and Time-Relaxed Interleaving DRRZ. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(8): 2337-2347 (2014) - [c21]Xue Han, Nan Zhao, Qi Wei, Fei Qiao, Huazhong Yang, Hui Wang
A single channel, 6-bit 410-ms/s asynchronous SAR ADC based on 3bits/stage. NEWCAS 2014: 57-60 - 2013
- [j14]Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang
Design Methodology of the Heterogeneous Multi-core Processor With the Combination of Parallelized Multi-core Simulator and Common Register File-Based Instruction Set Extension Architecture. J. Comput. 8(2): 356-364 (2013) - [c20]Shuai Tao, Xiaoming Chen, Yu Wang
HS3DPG: Hierarchical simulation for 3D P/G network. ASP-DAC 2013: 509-514 - 2012
- [c19]Bo Zhao, Huazhong Yang, Hui Wang
A low-power fast-settling bond-wire frequency synthesizer with a dynamic-bandwidth scheme. ISCAS 2012: 1367-1370 - 2011
- [j13]Bo Zhao, Guangming Yu, Tao Chen, Pengpeng Chen, Huazhong Yang, Hui Wang:
A Low-Power IF Circuit with 5 dB Minimum Input SNR for GFSK Low-IF Receivers. IEICE Trans. Electron. 94-C(10): 1680-1689 (2011) - [c18]Ni Zhou, Fei Qiao, Huazhong Yang, Hui Wang
Low-Power Off-Chip Memory Design for Video Decoder Using Embedded Bus-Invert Coding. ISADS 2011: 251-255 - 2010
- [j12]Li Li, Yongpan Liu, Huazhong Yang, Hui Wang:
Lightweight Precision-Adaptive Time Synchronization in Wireless Sensor Networks. IEICE Trans. Commun. 93-B(9): 2299-2308 (2010) - [j11]Guangming Yu, Yu Wang
Fast-locking all-digital phase-locked loop with digitally controlled oscillator tuning word estimating and presetting. IET Circuits Devices Syst. 4(3): 207-217 (2010) - [j10]Qian Ding, Yu Wang
Output remapping technique for critical paths soft-error rate reduction. IET Comput. Digit. Tech. 4(4): 325-333 (2010) - [j9]Beihua Ying, Yongpan Liu, Huazhong Yang, Hui Wang:
Evaluation of Tunable Data Compression in Energy-Aware Wireless Sensor Networks. Sensors 10(4): 3195-3217 (2010) - [c17]Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang:
A fault-tolerant structure for reliable multi-core systems based on hardware-software co-design. ISQED 2010: 191-197
2000 – 2009
- 2009
- [c16]Jue Wang, Beihua Ying, Yongpan Liu, Huazhong Yang, Hui Wang:
Energy efficient architecture of sensor network node based on compression accelerator. ACM Great Lakes Symposium on VLSI 2009: 117-120 - [i1]Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang:
A Fault-tolerant Structure for Reliable Multi-core Systems Based on Hardware-Software Co-design. CoRR abs/0910.3736 (2009) - 2008
- [j8]Fei Qiao, Huazhong Yang, Gang Huang, Hui Wang:
Implementation of low-swing differential interface circuits for high-speed on-chip asynchronous interconnection. Sci. China Ser. F Inf. Sci. 51(7): 975-984 (2008) - [j7]Yu Wang
Two-Phase Fine-Grain Sleep Transistor Insertion Technique in Leakage Critical Circuits. IEEE Trans. Very Large Scale Integr. Syst. 16(9): 1101-1113 (2008) - [c15]Qian Ding, Yu Wang
Output Remapping Technique for Soft-Error Rate Reduction in Critical Paths. ISQED 2008: 74-77 - 2007
- [j6]JianXing Fan, Huazhong Yang, Hui Wang, Xiaolang Yan, Chaohuan Hou:
Phase noise analysis of oscillators with Sylvester representation for periodic time-varying modulus matrix by regular perturbations. Sci. China Ser. F Inf. Sci. 50(4): 587-599 (2007) - [j5]Fei Qiao, Huazhong Yang, Dingli Wei, Hui Wang:
Modified Conditional-Precharge Sense-amplifier-Based Flip-Flop with Improved Speed. J. Circuits Syst. Comput. 16(2): 199-210 (2007) - [c14]Zhixin Tian, Yongpan Liu, Huazhong Yang, Hui Wang:
A Hybrid Genetic Algorithm with Critical Primary Inputs Sharing and Minor Primary Inputs Bits Climbing for Circuit Maximum Power Estimation. ICNC (4) 2007: 183-187 - [c13]Yongpan Liu, Huazhong Yang, Robert P. Dick, Hui Wang, Li Shang:
Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems. ISQED 2007: 204-209 - 2006
- [j4]Yu Wang, Huazhong Yang, Hui Wang:
Signal-Path-Level Dual-VT Assignment for Leakage Power Reduction. J. Circuits Syst. Comput. 15(2): 197-216 (2006) - [c12]Yu Wang, Hui Wang, Huazhong Yang:
Fine-grain Sleep Transistor Placement Considering Leakage Feedback Gate. APCCAS 2006: 964-967 - [c11]Yongpan Liu, Yu Wang, Feng Zhang, Rong Luo, Hui Wang:
A New Thermal-Conscious System-Level Methodology for Energy-Efficient Processor Voltage Selection. APCCAS 2006: 968-971 - [c10]Saihua Lin, Rong Luo, Huazhong Yang, Hui Wang:
A 0.9V 10GHz 71µW Static D Flip-flop by using FinFET Devices. APCCAS 2006: 1795-1798 - [c9]Ning Ge, Yuyu Liu, Huazhong Yang, Hui Wang:
Sigma-delta based clock recovery using on-chip PLL in FPGA. FPT 2006: 135-140 - [c8]Yu Wang, Yongpan Liu, Rong Luo, Huazhong Yang, Hui Wang:
Two-phase fine-grain sleep transistor insertion technique in leakage critical circuits. ISLPED 2006: 238-243 - [c7]Yu Wang, Hai Lin, Huazhong Yang, Rong Luo, Hui Wang:
Simultaneous Fine-grain Sleep Transistor Placement and Sizing for Leakage Optimization. ISQED 2006: 723-728 - [c6]Hai Lin, Yu Wang, Rong Luo, Huazhong Yang, Hui Wang:
IR-drop Reduction Through Combinational Circuit Partitioning. PATMOS 2006: 370-381 - [c5]Qian Ding, Rong Luo, Hui Wang, Huazhong Yang, Yuan Xie:
Modeling the Impact of Process Variation on Critical Charge Distribution. SoCC 2006: 243-246 - [c4]Jun Chen, Rong Luo, Huazhong Yang, Hui Wang:
A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator. VLSI Design 2006: 377-380 - 2005
- [j3]Shuzheng Xu, Huazhong Yang, Hui Wang:
Application of DAPSK in HF communications. IEEE Commun. Lett. 9(7): 613-615 (2005) - [c3]Yongpan Liu, Huazhong Yang, Rong Luo, Hui Wang:
A Hierarchical Approach for Incremental Floorplan Based on Genetic Algorithms. ICNC (3) 2005: 219-224 - [c2]Hui Zhang, Huazhong Yang, Shuzheng Xu, Hui Wang:
Improved Multiuser Detection for Fast FH/MFSK Systems. ICWN 2005: 130-136 - 2002
- [j2]Gang Huang, Huazhong Yang, Rong Luo, Hui Wang:
An approach to predicting dynamic power dissipation of coupled interconnect network in dynamic CMOS logic circuits. Sci. China Ser. F Inf. Sci. 45(4): 286-298 (2002) - 2001
- [j1]Bin Chen, Huazhong Yang, Hui Wang:
Noise estimation for deep sub-micron integrated circuits. Sci. China Ser. F Inf. Sci. 44(5): 396-400 (2001)
1990 – 1999
- 1999
- [c1]Huazhong Yang, Rong Luo, Hui Wang, Runsheng Liu:
An SA-Based Nonlinear Function Synthesizer for Linear Analog Integrated Circuits. ASP-DAC 1999: 9-
Coauthor Index
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