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Yoshiki Yamaguchi
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2020 – today
- 2024
- [j17]Iman Firmansyah, Yoshiki Yamaguchi, Tsutomu Maruyama, Yuta Matsuura, Heming Zhang, Shin Kawai, Hajime Nobuhara:
FPGA-based stereo matching for crop height measurement using monocular camera. Microprocess. Microsystems 108: 105063 (2024) - [c67]Kaijie Wei, Hideharu Amano, Ryohei Niwase, Yoshiki Yamaguchi:
A data compressor for FPGA-based state vector quantum simulators. HEART 2024: 63-70 - [c66]Yuxi Tan, Masaru Nishimura, Riadh Ben Abdelhamid, Bingjie Guo, Qixiang Gao, Yoshiki Yamaguchi:
Systolic Array-Based Many-Core Processor with Simultaneous Dual-Instruction Issuance. HEART 2024: 119-125 - [c65]Takeo Kurosawa, Yoshiki Yamaguchi, Ryouhei Tsugami, Toshihito Fujiwara, Tatsuya Fukui, Satoshi Narikawa:
Low-latency and high-bandwidth communication using HSS transceivers on a Versal FPGA. ICCE 2024: 1-2 - [c64]Ryo Nakagawa, Yoshiki Yamaguchi, Hajime Nobuhara, Iman Firmansyah, Kai Sheng:
Stereo Vision System for Crop Height Measurement Using a Monocular Camera-Equipped Drone. ICCE 2024: 1-2 - [c63]Yoshiyuki Oshima, Yoshiki Yamaguchi, Ryouhei Tsugami, Toshihito Fujiwara, Tatsuya Fukui, Satoshi Narikawa:
FPGA-based ultra-low latency background remover. ICCE 2024: 1-2 - [c62]Yuxi Tan, Riadh Ben Abdelhamid, Bingjie Guo, Qixiang Gao, Masaru Nishimura, Yoshiki Yamaguchi:
Scalable dual-instruction multiple-data processing on an efficient systolic-array architecture. IPDPS (Workshops) 2024: 1 - 2023
- [j16]Riadh Ben Abdelhamid, Yoshiki Yamaguchi, Taisuke Boku:
A Scalable Many-core Overlay Architecture on an HBM2-enabled Multi-Die FPGA. ACM Trans. Reconfigurable Technol. Syst. 16(1): 15:1-15:33 (2023) - [c61]Yoshiki Kunimoto, Qiong Chang, Yoshiki Yamaguchi, Tsutomu Maruyama:
GPU Acceleration of Multi-Object Tracking with Motion Vector Interpolation and Affine Transformation. ASAP 2023: 127-134 - [c60]Kaijie Wei, Ryohei Niwase, Hideharu Amano, Yoshiki Yamaguchi, Takefumi Miyoshi:
A state vector quantum simulator working on FPGAs with extensible SATA storage. ICFPT 2023: 272-273 - [c59]Ryohei Niwase, Hikaru Harasawa, Yoshiki Yamaguchi, Kaijie Wei, Hideharu Amano, Takefumi Miyoshi:
Enormous-Scale Quantum State Vector Calculation with FPGA-accelerated SATA storages. ICFPT 2023: 288-289 - [c58]Yoon Jongkwan, Yoshiki Yamaguchi, Yowichi Fujita, Yoshinori Fukao, Eitaro Hamada, Tetsuichi Kishishita, Youichi Igarashi, Masayoshi Shoji, Kazuki Ueno:
FPGA-based detector with SiC sensing for real-time monitoring of muon beams: A preliminary report of the SCIBER-1 system in COMET Phase-α. HEART 2023: 35-40 - [c57]Riadh Ben Abdelhamid, Gen Kuwazawa, Yoshiki Yamaguchi:
Quantitative study of floating-point precision on modern FPGAs. HEART 2023: 49-58 - [c56]Ryohei Kobayashi, Norihisa Fujita, Yoshiki Yamaguchi, Taisuke Boku, Kohji Yoshikawa, Makito Abe, Masayuki Umemura:
GPU-FPGA-accelerated Radiative Transfer Simulation with Inter-FPGA Communication. HPC Asia 2023: 117-125 - [c55]Ryohei Niwase, Hikaru Harasawa, Yoshiki Yamaguchi, Kaijie Wei, Hideharu Amano:
A cost/power efficient storage system with directly connected FPGA and SATA disks. MCSoC 2023: 51-58 - 2022
- [j15]Iman Firmansyah, Yoshiki Yamaguchi:
Real-Time FPGA Implementation of FIR Filter Using OpenCL Design. J. Signal Process. Syst. 94(1): 117-129 (2022) - [c54]Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Taisuke Boku:
Implementation and Performance Evaluation of Memory System Using Addressable Cache for HPC Applications on HBM2 Equipped FPGAs. Euro-Par Workshops 2022: 121-132 - [c53]Iman Firmansyah, Yoshiki Yamaguchi, Ryo Nakagawa:
FPGA-based acceleration of stereo matching using OpenCL. IC3INA 2022: 1-5 - [c52]Riadh Ben Abdelhamid, Yoshiki Yamaguchi:
Packed SIMD Vectorization of the DRAGON2-CB. MCSoC 2022: 85-92 - [c51]Ryohei Kobayashi, Norihisa Fujita, Yoshiki Yamaguchi, Taisuke Boku, Kohji Yoshikawa, Makito Abe, Masayuki Umemura:
Accelerating Radiative Transfer Simulation on NVIDIA GPUs with OpenACC. PDCAT 2022: 344-358 - 2021
- [j14]Riadh Ben Abdelhamid, Yoshiki Yamaguchi, Taisuke Boku:
A Highly-Efficient and Tightly-Connected Many-Core Overlay Architecture. IEEE Access 9: 65277-65292 (2021) - [c50]Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Taisuke Boku:
HBM2 Memory System for HPC Applications on an FPGA. CLUSTER 2021: 783-786 - [c49]Naoya Umezu, Yoshiki Yamaguchi, Taisuke Boku:
An FPGA-based storage control with load balancing. CLUSTER 2021: 791-794 - [c48]Kazuki Furukawa, Ryohei Kobayashi, Tomoya Yokono, Norihisa Fujita, Yoshiki Yamaguchi, Taisuke Boku, Kohji Yoshikawa, Masayuki Umemura:
An efficient RTL buffering scheme for an FPGA-accelerated simulation of diffuse radiative transfer. FPT 2021: 1-9 - [c47]Iman Firmansyah, Yoshiki Yamaguchi:
FPGA-Based Implementation of the Stereo Matching Algorithm Using High-Level Synthesis. MCSoC 2021: 1-7 - 2020
- [j13]Ryohei Kobayashi, Norihisa Fujita, Yoshiki Yamaguchi, Taisuke Boku, Kohji Yoshikawa, Makito Abe, Masayuki Umemura:
Multi-Hybrid Accelerated Simulation by GPU and FPGA on Radiative Transfer Simulation in Astrophysics. J. Inf. Process. 28: 1073-1089 (2020) - [j12]Iman Firmansyah, Yoshiki Yamaguchi:
FPGA-based implementation of a chirp signal generator using an OpenCL design. Microprocess. Microsystems 77: 103199 (2020) - [c46]Changdao Du, Iman Firmansyah, Yoshiki Yamaguchi:
FPGA-Based Computational Fluid Dynamics Simulation Architecture via High-Level Synthesis Design Method. ARC 2020: 232-246 - [c45]Riadh Ben Abdelhamid, Yoshiki Yamaguchi:
A Block-Based Systolic Array on an HBM2 FPGA for DNA Sequence Alignment. ARC 2020: 298-313 - [c44]Ryohei Kobayashi, Norihisa Fujita, Yoshiki Yamaguchi, Taisuke Boku, Kohji Yoshikawa, Makito Abe, Masayuki Umemura:
Accelerating Radiative Transfer Simulation with GPU-FPGA Cooperative Computation. ASAP 2020: 9-16 - [c43]Riadh Ben Abdelhamid, Yoshiki Yamaguchi, Taisuke Boku:
Condensing an overload of parallel computing ingredients into a single architecture recipe. ASAP 2020: 25-28 - [c42]Changdao Du, Iman Firmansyah, Yoshiki Yamaguchi:
High-Performance Computation of LGCA Fluid Dynamics on an FPGA-Based Platform. ICCCS 2020: 520-525 - [c41]Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Kohji Yoshikawa, Makito Abe, Masayuki Umemura:
Toward OpenACC-enabled GPU-FPGA Accelerated Computing. CLUSTER 2020: 422-423 - [c40]Ruochong Fan, Yoshiki Yamaguchi:
A study of FPGA-based cluster computing by high-speed serial-link communication. CANDAR (Workshops) 2020: 401-405 - [c39]Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Tomohiro Ueno, Kentaro Sano, Taisuke Boku:
Performance Evaluation of Pipelined Communication Combined with Computation in OpenCL Programming on FPGA. IPDPS Workshops 2020: 450-459 - [c38]Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Taisuke Boku, Kohji Yoshikawa, Makito Abe, Masayuki Umemura:
OpenCL-enabled Parallel Raytracing for Astrophysical Application on Multiple FPGAs with Optical Links. H2RC@SC 2020: 48-55
2010 – 2019
- 2019
- [j11]Iman Firmansyah, Yoshiki Yamaguchi:
OpenCL Implementation of FPGA-Based Signal Generation and Measurement. IEEE Access 7: 48849-48859 (2019) - [c37]Riadh Ben Abdelhamid, Yoshiki Yamaguchi, Taisuke Boku:
MITRACA: Manycore Interlinked Torus Reconfigurable Accelerator Architecture. ASAP 2019: 38 - [c36]Iman Firmansyah, Changdao Du, Norihisa Fujita, Yoshiki Yamaguchi, Taisuke Boku:
FPGA-based Implementation of Memory-Intensive Application using OpenCL. HEART 2019: 16:1-16:4 - [c35]Changdao Du, Yoshiki Yamaguchi:
A High-Level Synthesis Design for a Scalable Hydrodynamic Simulation on OpenCL FPGA Platform. HEART 2019: 19:1-19:4 - [c34]Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Taisuke Boku:
Parallel Processing on FPGA Combining Computation and Communication in OpenCL Programming. IPDPS Workshops 2019: 479-488 - [c33]Ryohei Kobayashi, Norihisa Fujita, Yoshiki Yamaguchi, Ayumi Nakamichi, Taisuke Boku:
GPU-FPGA Heterogeneous Computing with OpenCL-Enabled Direct Memory Access. IPDPS Workshops 2019: 489-498 - [c32]Riadh Ben Abdelhamid, Yoshiki Yamaguchi, Taisuke Boku:
MITRACA: A Next-Gen Heterogeneous Architecture. MCSoC 2019: 304-311 - 2018
- [c31]Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Yuma Oobata, Taisuke Boku, Makito Abe, Kohji Yoshikawa, Masayuki Umemura:
Accelerating Space Radiative Transfer on FPGA using OpenCL. HEART 2018: 6:1-6:7 - [c30]Ryohei Kobayashi, Yuma Oobata, Norihisa Fujita, Yoshiki Yamaguchi, Taisuke Boku:
OpenCL-ready High Speed FPGA Network for Reconfigurable High Performance Computing. HPC Asia 2018: 192-201 - [p1]Tsutomu Maruyama, Yoshiki Yamaguchi, Yasunori Osana:
Programmable Logic Devices (PLDs) in Practical Applications. Principles and Structures of FPGAs 2018: 179-205 - 2017
- [c29]Masataka Nakano, Yoshiki Yamaguchi:
A Study of TRAX Player by Template Matching. CANDAR 2017: 570-574 - [c28]Hiroki Nakamura, Hirotaka Takayama, Yoshiki Yamaguchi, Taisuke Boku:
Thorough analysis of PCIe Gen3 communication. ReConFig 2017: 1-6 - 2016
- [j10]Chengzhe Li, Lai Yoong Yee, Hiroshi Maruyama, Yoshiki Yamaguchi:
FPGA-based Volleyball Player Tracker. SIGARCH Comput. Archit. News 44(4): 80-86 (2016) - [c27]Iman Firmansyah, Yoshiki Yamaguchi, Taisuke Boku:
Performance evaluation of Stratix V DE5-Net FPGA board for high performance computing. IC3INA 2016: 23-27 - 2015
- [j9]Kei Kinoshita, Yoshiki Yamaguchi, Daisuke Takano, Tomoyuki Okamura, Tetsuhiko Yao:
Energy Efficiency Improvement by Dynamic Reconfiguration for Embedded Systems. IEICE Trans. Inf. Syst. 98-D(2): 220-229 (2015) - 2013
- [c26]Kenta Fujinami, Yoshiki Yamaguchi, Akira Sugiura, Yuetsu Kodama:
The study of three-dimensional multiphase-flow simulator. FPL 2013: 1-4 - [c25]Suguru Ochiai, Yoshiki Yamaguchi, Yuetsu Kodama:
The Flexible Sound Synthesizer on an FPGA. CANDAR 2013: 104-111 - 2012
- [j8]Kei Kinoshita, Daisuke Takano, Tomoyuki Okamura, Tetsuhiko Yao, Yoshiki Yamaguchi:
An augmented reality system with a coarse-grained reconfigurable device. SIGARCH Comput. Archit. News 40(5): 16-21 (2012) - 2011
- [j7]Shoji Tanabe, Takuya Nagashima, Yoshiki Yamaguchi:
A study of an FPGA based flexible SIMD processor. SIGARCH Comput. Archit. News 39(4): 86-89 (2011) - [c24]Yoshiki Yamaguchi, Kuen Hung Tsoi, Wayne Luk:
FPGA-Based Smith-Waterman Algorithm: Analysis and Novel Design. ARC 2011: 181-192 - [c23]Yoshiki Yamaguchi, Kuen Hung Tsoi, Wayne Luk:
A comparison of FPGAs, GPUS and CPUS for Smith-Waterman algorithm (abstract only). FPGA 2011: 281
2000 – 2009
- 2009
- [j6]Keiko Ikeda, Moritoshi Yasunaga, Yoshiki Yamaguchi, Yorihisa Yamamoto, Ikuo Yoshihara:
A visual-inspection system using a self-organizing map. Artif. Life Robotics 14(4): 506-510 (2009) - [c22]Atsuhiro Kanamaru, Hiroyuki Kawai, Yoshiki Yamaguchi, Morisothi Yasunaga:
Tile-Based Fault Tolerant Approach Using Partial Reconfiguration. ARC 2009: 293-299 - [c21]Shuichi Asano, Tsutomu Maruyama, Yoshiki Yamaguchi:
Performance comparison of FPGA, GPU and CPU in image processing. FPL 2009: 126-131 - [c20]Saya Hinaga, Yoshiki Yamaguchi, Tetsuhiko Yao, Tohru Kawabe:
Dynamic reconfiguration system for real-time video processing. FPL 2009: 691-694 - 2008
- [j5]Moritoshi Yasunaga, Noriyuki Aibe, Yoshiki Yamaguchi, Yorihisa Yamamoto, Takaaki Awano, Ikuo Yoshihara:
A reconfigurable VLSI-based double-lens tracking camera. Artif. Life Robotics 12(1-2): 219-222 (2008) - [j4]Moritoshi Yasunaga, Noriyuki Aibe, Yoshiki Yamaguchi, Yorihisa Yamamoto, Takaaki Awano, Ikuo Yoshihara:
Real-world applications on the reconfigurable-VLSI-based double-lens tracking-camera. Artif. Life Robotics 13(1): 73-76 (2008) - [c19]Takashi Saegusa, Tsutomu Maruyama, Yoshiki Yamaguchi:
How fast is an FPGA in image processing? FPL 2008: 77-82 - [c18]Hiroyuki Kawai, Yoshiki Yamaguchi, Moritoshi Yasunaga, Kyrre Glette, Jim Tørresen:
An adaptive pattern recognition hardware with on-chip shift register-based partial reconfiguration. FPT 2008: 169-176 - [c17]Moritoshi Yasunaga, Yoshiki Yamaguchi, Hiroshi Nakayama, Ikuo Yoshihara, Naoki Koizumi, Jung Hwan Kim:
The Segmental-Transmission-Line: Its Design and Prototype Evaluation. ICES 2008: 130-140 - 2007
- [j3]Yoshiki Yamaguchi, Moritoshi Yasunaga, Kazuya Hayashi, Noriyuki Aibe, Yorihisa Yamamoto, Ikuo Yoshihara:
A bio-inspired tracking camera system. Artif. Life Robotics 11(1): 128-134 (2007) - [j2]Shingo Masuno, Tsutomu Maruyama, Yoshiki Yamaguchi, Akihiko Konagaya:
Multiple Sequence Alignment Based on Dynamic Programming Using FPGA. IEICE Trans. Inf. Syst. 90-D(12): 1939-1946 (2007) - [j1]Yoshiki Yamaguchi, Tsutomu Maruyama, Ryuzo Azuma, Moritoshi Yasunaga, Akihiko Konagaya:
Mesoscopic-level Simulation of Dynamics and Interactions of Biological Molecules Using Monte Carlo Simulation. J. VLSI Signal Process. 48(3): 287-299 (2007) - [c16]Yoshiki Yamaguchi, Kenji Kanazawa, Yoshiharu Ohke, Tsutomu Maruyama:
An Acceleration Method for Evolutionary Systems Based on Iterated Prisoner's Dilemma. ARC 2007: 358-364 - [c15]Yoshiki Yamaguchi, Tsutomu Maruyama, Fumikazu Konishi, Akihiko Konagaya:
High speed tablation system using an FPGA designed for distribution tables of frequent DNA subsequences. FPL 2007: 145-150 - [c14]Shingo Masuno, Tsutomu Maruyama, Yoshiki Yamaguchi, Akihiko Konagaya:
An FPGA Implementation of Multiple Sequence Alignment Based on Carrillo-Lipman Method. FPL 2007: 489-492 - [c13]Yoshiki Yamaguchi, Noriyuki Aibe, Moritoshi Yasunaga, Yorihisa Yamamoto, Takaaki Awano, Ikuo Yoshihara:
Bio-Inspired Functional Asymmetry Camera System. ICONIP (2) 2007: 637-646 - [c12]Yusuke Arai, Ryo Sawai, Yoshiki Yamaguchi, Tsutomu Maruyama, Moritoshi Yasunaga:
A Lattice Gas Cellular Automata Simulator on the Cell Broadband Engine. PARCO 2007: 459-466 - 2006
- [c11]Kyrre Glette, Jim Tørresen, Moritoshi Yasunaga, Yoshiki Yamaguchi:
On-Chip Evolution Using a Soft Processor Core Applied to Image Recognition. AHS 2006: 373-380 - [c10]Shingo Masuno, Tsutomu Maruyama, Yoshiki Yamaguchi, Akihiko Konagaya:
Multidimensional Dynamic Programming for Homology Search on Distributed Systems. Euro-Par 2006: 1127-1137 - [c9]Hiroyuki Kawai, Yoshiki Yamaguchi, Moritoshi Yasunaga:
Realization of the sound space environment for the radiation-tolerant space craft. ReConFig 2006: 198-205 - 2005
- [c8]Shingo Masuno, Tsutomu Maruyama, Yoshiki Yamaguchi, Akihiko Konagaya:
Multidimensional Dynamic Programming for Homology Search. FPL 2005: 173-178 - [c7]Yoshiki Yamaguchi, Tsutomu Maruyama, Ryuzo Azuma, Akihiko Konagaya:
Spatiotemporal Simulation of a Single Living Cell. FPT 2005: 267-274 - 2004
- [c6]Yoshiki Yamaguchi, Tsutomu Maruyama, Akihiko Konagaya:
Three-Dimensional Dynamic Programming for Homology Search. FPL 2004: 505-515 - 2002
- [c5]Yoshiki Yamaguchi, Yosuke Miyajima, Tsutomu Maruyama, Akihiko Konagaya:
High Speed Homology Search Using Run-Time Reconfiguration. FPL 2002: 281-291 - [c4]Yoshiki Yamaguchi, Tsutomu Maruyama, Akihiko Konagaya:
High Speed Homology Search with FPGAs. Pacific Symposium on Biocomputing 2002: 271-282 - 2001
- [c3]Tsutomu Maruyama, Yoshiki Yamaguchi, Atsushi Kawase:
An Approach to Real-Time Visualization of PIV Method with FPGA. FPL 2001: 601-606 - 2000
- [c2]Yoshiki Yamaguchi, Akira Miyashita, Tsutomu Maruyama, Tsutomu Hoshino:
A Co-processor System with a Virtex FPGA for Evolutionary Computation. FPL 2000: 240-249
1990 – 1999
- 1999
- [c1]Yoshiki Yamaguchi, Tsutomu Maruyama, Tsutomu Hoshino:
High Speed Hardware Computation of Co-evolution Models. ECAL 1999: 566-574
Coauthor Index
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last updated on 2024-10-15 21:41 CEST by the dblp team
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