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Daichi Mukunoki
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2020 – today
- 2024
- [c22]Stef Graillat
, Fabienne Jézéquel
Reduced-Precision and Reduced-Exponent Formats for Accelerating Adaptive Precision Sparse Matrix-Vector Product. Euro-Par (3) 2024: 17-30 - 2023
- [c21]Daichi Mukunoki
Sparse Matrix-Vector Multiplication with Reduced-Precision Memory Accessor. MCSoC 2023: 608-615 - 2022
- [c20]Daichi Mukunoki
Infinite-Precision Inner Product and Sparse Matrix-Vector Multiplication Using Ozaki Scheme with Dot2 on Manycore Processors. PPAM (1) 2022: 40-54 - 2021
- [c19]Daichi Mukunoki
Conjugate Gradient Solvers with High Accuracy and Bit-wise Reproducibility between CPU and GPU using Ozaki scheme. HPC Asia 2021: 100-109 - [c18]Takeyuki Harayama, Shuhei Kudo, Daichi Mukunoki
A Rapid Euclidean Norm Calculation Algorithm that Reduces Overflow and Underflow. ICCSA (1) 2021: 95-110 - [c17]Daichi Mukunoki
Accurate Matrix Multiplication on Binary128 Format Accelerated by Ozaki Scheme. ICPP 2021: 78:1-78:11 - [c16]Jens Domke, Emil Vatai
Matrix Engines for High Performance Computing: A Paragon of Performance or Grasping at Straws? IPDPS 2021: 1056-1065 - [c15]Daichi Mukunoki
Task Scheduling Strategies for Batched Basic Linear Algebra Subprograms on Many-core CPUs. MCSoC 2021: 234-241 - 2020
- [j1]Daichi Mukunoki
Performance and energy consumption of accurate and mixed-precision linear algebra kernels on GPUs. J. Comput. Appl. Math. 372: 112701 (2020) - [c14]Daichi Mukunoki
DGEMM Using Tensor Cores, and Its Accurate and Reproducible Versions. ISC 2020: 230-248 - [c13]Fabienne Jézéquel, Stef Graillat, Daichi Mukunoki
Can We Avoid Rounding-Error Estimation in HPC Codes and Still Get Trustworthy Results? VSTTE 2020: 163-177 - [i2]Roman Iakymchuk
White Paper from Workshop on Large-scale Parallel Numerical Computing Technology (LSPANC 2020): HPC and Computer Arithmetic toward Minimal-Precision Computing. CoRR abs/2004.04628 (2020) - [i1]Jens Domke, Emil Vatai, Aleksandr Drozd, Peng Chen, Yosuke Oyama, Lingqi Zhang, Shweta Salaria, Daichi Mukunoki, Artur Podobas, Mohamed Wahib, Satoshi Matsuoka:
Matrix Engines for High Performance Computing: A Paragon of Performance or Grasping at Straws? CoRR abs/2010.14373 (2020)
2010 – 2019
- 2019
- [c12]Yiyu Tan, Toshiyuki Imamura, Daichi Mukunoki
Design of an FPGA-Based Matrix Multiplier with Task Parallelism. PARCO 2019: 241-250 - [c11]Daichi Mukunoki
Reproducible BLAS Routines with Tunable Accuracy Using Ozaki Scheme for Many-Core Architectures. PPAM (1) 2019: 516-527 - 2018
- [c10]Daichi Mukunoki
Performance Analysis of 2D-compatible 2.5D-PDGEMM on Knights Landing Cluster. ICCS (3) 2018: 853-858 - 2017
- [c9]Toshiyuki Imamura, Daichi Mukunoki
Design Towards Modern High Performance Numerical LA Library Enabling Heterogeneity and Flexible Data Formats. PARCO 2017: 97-106 - [c8]Daichi Mukunoki
Implementation and Performance Analysis of 2.5D-PDGEMM on the K Computer. PPAM (1) 2017: 348-358 - 2016
- [c7]Daichi Mukunoki
Reduced-Precision Floating-Point Formats on GPUs for High Performance and Energy Efficient Computation. CLUSTER 2016: 144-145 - [c6]Daichi Mukunoki
Automatic Thread-Block Size Adjustment for Memory-Bound BLAS Kernels on GPUs. MCSoC 2016: 377-384 - 2015
- [c5]Daichi Mukunoki
Fast Implementation of General Matrix-Vector Multiplication (GEMV) on Kepler GPUs. PDP 2015: 642-650 - 2013
- [c4]Daichi Mukunoki
Optimization of Sparse Matrix-Vector Multiplication for CRS Format on NVIDIA Kepler Architecture GPUs. ICCSA (5) 2013: 211-223 - [c3]Daichi Mukunoki
Using Quadruple Precision Arithmetic to Accelerate Krylov Subspace Methods on GPUs. PPAM (1) 2013: 632-642 - 2012
- [c2]Daichi Mukunoki
Implementation and Evaluation of Triple Precision BLAS Subroutines on GPUs. IPDPS Workshops 2012: 1378-1386 - 2010
- [c1]Daichi Mukunoki
Implementation and Evaluation of Quadruple Precision BLAS Functions on GPUs. PARA (1) 2010: 249-259
Coauthor Index
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