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Philippe Hoogvorst
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2010 – 2019
- 2016
- [c21]Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache:
Improving the Big Mac Attack on Elliptic Curve Cryptography. The New Codebreakers 2016: 374-386 - 2015
- [i5]Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache:
Improving the Big Mac Attack on Elliptic Curve Cryptography. IACR Cryptol. ePrint Arch. 2015: 819 (2015) - 2013
- [j6]Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache:
A synthesis of side-channel attacks on elliptic curve cryptography in smart-cards. J. Cryptogr. Eng. 3(4): 241-265 (2013) - [c20]Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache:
Dynamic countermeasure against the Zero Power Analysis. ISSPIT 2013: 140-147 - [i4]Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache:
Dynamic Countermeasure Against the Zero Power Analysis. IACR Cryptol. ePrint Arch. 2013: 764 (2013) - 2012
- [c19]Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache:
Low-Cost Countermeasure against RPA. CARDIS 2012: 106-122 - [c18]Cédric Murdica, Sylvain Guilley, Jean-Luc Danger, Philippe Hoogvorst, David Naccache:
Same Values Power Analysis Using Special Points on Elliptic Curves. COSADE 2012: 183-198 - [c17]Guillaume Barbu, Philippe Hoogvorst, Guillaume Duc:
Application-Replay Attack on Java Cards: When the Garbage Collector Gets Confused. ESSoS 2012: 1-13 - [c16]Guillaume Barbu, Philippe Hoogvorst, Guillaume Duc:
Tampering with Java Card Exceptions - The Exception Proves the Rule. SECRYPT 2012: 55-63 - 2011
- [c15]Guillaume Barbu, Guillaume Duc, Philippe Hoogvorst:
Java Card Operand Stack: Fault Attacks, Combined Attacks and Countermeasures. CARDIS 2011: 297-313 - [i3]Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin:
A Secure Asynchronous FPGA Architecture, Experimental Results and Some Debug Feedback. CoRR abs/1103.1360 (2011) - 2010
- [j5]Sylvain Guilley, Laurent Sauvage
, Florent Flament, Vinh-Nga Vong, Philippe Hoogvorst, Renaud Pacalet:
Evaluation of Power Constant Dual-Rail Logics Countermeasures against DPA with Design Time Security Metrics. IEEE Trans. Computers 59(9): 1250-1263 (2010)
2000 – 2009
- 2009
- [j4]Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst:
High speed true random number generator based on open loop structures in FPGAs. Microelectron. J. 40(11): 1650-1656 (2009) - 2008
- [j3]Sylvain Guilley, Laurent Sauvage
Security Evaluation of WDDL and SecLib Countermeasures against Power Attacks. IEEE Trans. Computers 57(11): 1482-1497 (2008) - [c14]Sumanta Chaudhuri
Physical Design of FPGA Interconnect to Prevent Information Leakage. ARC 2008: 87-98 - [c13]Sumanta Chaudhuri, Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Jean-Luc Danger:
An 8x8 run-time reconfigurable FPGA embedded in a SoC. DAC 2008: 120-125 - [c12]Sumanta Chaudhuri, Jean-Luc Danger, Philippe Hoogvorst, Sylvain Guilley:
Efficient tiling patterns for reconfigurable gate arrays. FPGA 2008: 257 - [c11]Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Philippe Hoogvorst:
Area optimization of cryptographic co-processors implemented in dual-rail with precharge positive logic. FPL 2008: 161-166 - [c10]Sylvain Guilley, Sumanta Chaudhuri
Place-and-Route Impact on the Security of DPL Designs in FPGAs. HOST 2008: 26-32 - [c9]Sumanta Chaudhuri
Efficient tiling patterns for reconfigurable gate arrays. SLIP 2008: 11-18 - [i2]Philippe Hoogvorst, Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Danger, Taha Beyrouthy, Laurent Fesquet:
A Reconfigurable Programmable Logic Block for a Multi-Style Asynchronous FPGA resistant to Side-Channel Attacks. CoRR abs/0809.3942 (2008) - 2007
- [j2]Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Renaud Pacalet, Yves Mathieu:
Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors. IEEE Des. Test Comput. 24(6): 546-555 (2007) - [j1]Sylvain Guilley, Philippe Hoogvorst, Renaud Pacalet:
A fast pipelined multi-mode DES architecture operating in IP representation. Integr. 40(4): 479-489 (2007) - [c8]Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin, Sumanta Chaudhuri
A Novel Asynchronous e-FPGA Architecture for Security Applications. FPT 2007: 369-372 - [c7]Philippe Hoogvorst, Sylvain Guilley, Sumanta Chaudhuri, Alin Razafindraibe, Taha Beyrouthy, Laurent Fesquet:
A Reconfigurable Cell for a Multi-Style Asynchronous FPGA. ReCoSoC 2007: 15-22 - [i1]M. Abdelaziz Elaabid, Sylvain Guilley, Philippe Hoogvorst:
Template Attacks with a Power Model. IACR Cryptol. ePrint Arch. 2007: 443 (2007) - 2006
- [c6]Sumanta Chaudhuri
FASE: An Open Run-Time Reconfigurable FPGA Architecture for Tamper-Resistant and Secure Embedded Systems. ReConFig 2006: 47-55 - 2005
- [c5]Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu, Renaud Pacalet:
The "Backend Duplication" Method. CHES 2005: 383-397 - [c4]Sylvain Guilley, Philippe Hoogvorst:
The Proof by 2M-1: a Low-Cost Method to Check Arithmetic Computations. SEC 2005: 589-600 - 2004
- [c3]Sylvain Guilley, Philippe Hoogvorst, Renaud Pacalet:
Differential Power Analysis Model and Some Results. CARDIS 2004: 127-142 - [c2]Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu, Renaud Pacalet, Jean Provost:
CMOS Structures Suitable for Secured Hardware. DATE 2004: 1414-1415
1990 – 1999
- 1991
- [c1]Philippe Hoogvorst, Ronan Keryell, Philippe Matherat, Nicolas Paris:
POMP or How to Design a Massively Parallel Machine with Small Developments. PARLE (1) 1991: 83-100
Coauthor Index
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