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Victor Luchangco
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2020 – today
- 2022
- [j10]Gal Milman-Sela
, Alex Kogan
BQ: A Lock-Free Queue with Batching. ACM Trans. Parallel Comput. 9(1): 5:1-5:49 (2022) - [c50]Victor Luchangco:
Theory Meets Practice in the Algorand Blockchain (Invited Talk). OPODIS 2022: 1:1-1:1
2010 – 2019
- 2019
- [c49]Musab A. Alturki, Jing Chen, Victor Luchangco, Brandon M. Moore, Karl Palmskog, Lucas Peña, Grigore Rosu:
Towards a Verified Model of the Algorand Consensus Protocol in Coq. FM Workshops (1) 2019: 362-367 - [i1]Musab A. Alturki, Jing Chen, Victor Luchangco, Brandon M. Moore, Karl Palmskog, Lucas Peña, Grigore Rosu:
Towards a Verified Model of the Algorand Consensus Protocol in Coq. CoRR abs/1907.05523 (2019) - 2018
- [c48]Victor Luchangco:
Saying What You Mean. ApPLIED@PODC 2018: 3 - [c47]Gal Milman
BQ: A Lock-Free Queue with Batching. SPAA 2018: 99-109 - 2017
- [c46]Tingzhe Zhou, Victor Luchangco, Michael F. Spear
Extending Transactional Memory with Atomic Deferral. OPODIS 2017: 7:1-7:17 - [c45]Tingzhe Zhou, Victor Luchangco, Michael F. Spear
Hand-Over-Hand Transactions with Precise Memory Reclamation. SPAA 2017: 255-264 - [c44]Tingzhe Zhou, Victor Luchangco, Michael F. Spear
Brief Announcement: Extending Transactional Memory with Atomic Deferral. SPAA 2017: 371-373 - 2016
- [c43]Trevor Brown, Alex Kogan, Yossi Lev, Victor Luchangco:
Investigating the Performance of Hardware Transactions on a Multi-Socket Machine. SPAA 2016: 121-132 - 2014
- [j9]Geppino Pucci
Foreword: Parallelism in Algorithms and Architectures. Theory Comput. Syst. 55(3): 449-450 (2014) - [c42]Michael Wong, Eduard Ayguadé, Justin Gottschlich, Victor Luchangco, Bronis R. de Supinski, Barna L. Bihari:
Towards Transactional Memory for OpenMP. IWOMP 2014: 130-145 - 2013
- [j8]Simon Doherty, Lindsay Groves, Victor Luchangco, Mark Moir:
Towards formally specifying and verifying transactional memory. Formal Aspects Comput. 25(5): 769-799 (2013) - [c41]Jieung Kim, Sukyoung Ryu
Fine-Grained Function Visibility for Multiple Dispatch with Multiple Inheritance. APLAS 2013: 156-171 - [c40]Tim Harris, Yossi Lev, Victor Luchangco, Virendra J. Marathe, Mark Moir:
Constrained Data-Driven Parallelism. HotPar 2013 - [c39]Yujie Liu, Victor Luchangco, Michael F. Spear
Mindicators: A Scalable Approach to Quiescence. ICDCS 2013: 206-215 - [c38]Irina Calciu, David Dice, Yossi Lev, Victor Luchangco, Virendra J. Marathe, Nir Shavit:
NUMA-aware reader-writer locks. PPoPP 2013: 157-166 - [c37]Dave Dice, Yossi Lev, Yujie Liu, Victor Luchangco, Mark Moir:
Using hardware transactional memory to correct and simplify and readers-writer lock algorithm. PPoPP 2013: 261-270 - 2012
- [c36]Mohsen Lesani, Victor Luchangco, Mark Moir:
A Framework for Formally Verifying Software Transactional Memory Algorithms. CONCUR 2012: 516-530 - 2011
- [c35]Eric E. Allen, Justin Hilburn, Scott Kilpatrick, Victor Luchangco, Sukyoung Ryu
Type checking modular multiple dispatch with parametric polymorphism and multiple inheritance. OOPSLA 2011: 973-992 - [c34]Victor Luchangco, Virendra J. Marathe:
Transaction communicators: enabling cooperation among concurrent transactions. PPoPP 2011: 169-178 - [r1]Guy L. Steele Jr., Eric E. Allen, David Chase, Christine H. Flood, Victor Luchangco, Jan-Willem Maessen, Sukyoung Ryu:
Fortress (Sun HPCS Language). Encyclopedia of Parallel Computing 2011: 718-735 - 2010
- [j7]J. J. Hallett, Victor Luchangco, Sukyoung Ryu
Integrating coercion with subtyping and multiple dispatch. Sci. Comput. Program. 75(9): 787-795 (2010) - [j6]Srivatsan Ravi, Vincent Gramoli, Victor Luchangco:
Transactional memory, linking theory and practice. SIGACT News 41(4): 109-115 (2010) - [c33]Victor Luchangco, Virendra J. Marathe:
You are not alone: breaking transaction isolation. IWMSE@ICSE 2010: 50-53
2000 – 2009
- 2009
- [j5]Victor Luchangco, Mark Moir, Nir Shavit:
Nonblocking k -Compare-Single-Swap. Theory Comput. Syst. 44(1): 39-66 (2009) - [c32]Yossi Lev, Victor Luchangco, Marek Olszewski:
Scalable reader-writer locks. SPAA 2009: 101-110 - 2008
- [j4]Maurice Herlihy, Victor Luchangco:
Distributed computing and the multicore revolution. SIGACT News 39(1): 62-72 (2008) - [c31]Andrew Lutomirski, Victor Luchangco:
Efficient Large Almost Wait-Free Single-Writer Multireader Atomic Registers. OPODIS 2008: 560-563 - [c30]J. J. Hallett, Victor Luchangco, Sukyoung Ryu
Integrating coercion with subtyping and multiple dispatch. SAC 2008: 166-170 - [c29]Victor Luchangco:
Against lock-based semantics for transactional memory. SPAA 2008: 98-100 - 2007
- [j3]Steve Heller, Maurice Herlihy, Victor Luchangco, Mark Moir, William N. Scherer III, Nir Shavit:
A Lazy Concurrent List-Based Set Algorithm. Parallel Process. Lett. 17(4): 411-424 (2007) - [c28]Faith Ellen, Yossi Lev, Victor Luchangco, Mark Moir:
SNZI: scalable NonZero indicators. PODC 2007: 13-22 - [c27]Eric E. Allen, J. J. Hallett, Victor Luchangco, Sukyoung Ryu
Modular multiple dispatch with multiple inheritance. SAC 2007: 1117-1121 - [c26]Maurice Herlihy, Yossi Lev, Victor Luchangco, Nir Shavit:
A Simple Optimistic Skiplist Algorithm. SIROCCO 2007: 124-138 - 2006
- [c25]Peter Damron, Alexandra Fedorova, Yossi Lev, Victor Luchangco, Mark Moir, Daniel Nussbaum:
Hybrid transactional memory. ASPLOS 2006: 336-346 - [c24]Robert Colvin, Lindsay Groves, Victor Luchangco, Mark Moir:
Formal Verification of a Lazy Concurrent List-Based Set Algorithm. CAV 2006: 475-488 - [c23]Victor Luchangco, Daniel Nussbaum, Nir Shavit:
A Hierarchical CLH Queue Lock. Euro-Par 2006: 801-810 - [c22]Maurice Herlihy, Victor Luchangco, Mark Moir:
A flexible framework for implementing software transactional memory. OOPSLA 2006: 253-262 - 2005
- [j2]Maurice Herlihy, Victor Luchangco, Paul A. Martin, Mark Moir:
Nonblocking memory management support for dynamic-sized data structures. ACM Trans. Comput. Syst. 23(2): 146-196 (2005) - [c21]Steve Heller, Maurice Herlihy, Victor Luchangco, Mark Moir, William N. Scherer III, Nir Shavit:
A Lazy Concurrent List-Based Set Algorithm. OPODIS 2005: 3-16 - [c20]Faith Ellen Fich, Victor Luchangco, Mark Moir, Nir Shavit:
Obstruction-Free Algorithms Can Be Practically Wait-Free. DISC 2005: 78-92 - [c19]Faith Ellen Fich, Victor Luchangco, Mark Moir, Nir Shavit:
Obstruction-Free Step Complexity: Lock-Free DCAS as an Example. DISC 2005: 493-494 - 2004
- [c18]Simon Doherty, Lindsay Groves, Victor Luchangco, Mark Moir:
Formal Verification of a Practical Lock-Free Queue Algorithm. FORTE 2004: 97-114 - [c17]Eric E. Allen, David Chase, Victor Luchangco, Jan-Willem Maessen, Guy L. Steele Jr.:
Object-oriented units of measurement. OOPSLA 2004: 384-403 - [c16]Simon Doherty, Maurice Herlihy, Victor Luchangco, Mark Moir:
Bringing practical lock-free synchronization to 64-bit applications. PODC 2004: 31-39 - [c15]Simon Doherty, David Detlefs, Lindsay Groves, Christine H. Flood, Victor Luchangco, Paul Alan Martin, Mark Moir, Nir Shavit, Guy L. Steele Jr.:
DCAS is not a silver bullet for nonblocking algorithm design. SPAA 2004: 216-224 - 2003
- [c14]Maurice Herlihy, Victor Luchangco, Mark Moir:
Obstruction-Free Synchronization: Double-Ended Queues as an Example. ICDCS 2003: 522-529 - [c13]Maurice Herlihy, Victor Luchangco, Mark Moir, William N. Scherer III:
Software transactional memory for dynamic-sized data structures. PODC 2003: 92-101 - [c12]Victor Luchangco, Mark Moir, Nir Shavit:
Nonblocking k-compare-single-swap. SPAA 2003: 314-323 - [c11]Victor Luchangco, Mark Moir, Nir Shavit:
On the Uncontended Complexity of Consensus. DISC 2003: 45-59 - [c10]Maurice Herlihy, Victor Luchangco, Mark Moir:
Space and Time Adaptive Non-blocking Algorithms. CATS 2003: 260-280 - 2002
- [c9]Maurice Herlihy, Victor Luchangco, Paul A. Martin, Mark Moir:
Dynamic-sized lock-free data structures. PODC 2002: 131 - [c8]Maurice Herlihy, Victor Luchangco, Mark Moir:
The Repeat Offender Problem: A Mechanism for Supporting Dynamic-Sized, Lock-Free Data Structures. DISC 2002: 339-353 - 2001
- [c7]Victor Luchangco:
Modeling weakly consistent memories with locks. SPAA 2001: 332-333 - 2000
- [c6]Tadashi Araragi, Paul C. Attie, Idit Keidar, Kiyoshi Kogure, Victor Luchangco, Nancy A. Lynch, Ken Mano:
On Formal Modeling of Agent Computations. FAABS 2000: 48-62
1990 – 1999
- 1999
- [j1]Alan D. Fekete, David Gupta, Victor Luchangco, Nancy A. Lynch, Alexander A. Shvartsman
Eventually-Serializable Data Services. Theor. Comput. Sci. 220(1): 113-156 (1999) - 1998
- [c5]Matteo Frigo, Victor Luchangco:
Computation-Centric Memory Models. SPAA 1998: 240-249 - 1997
- [c4]Victor Luchangco:
Precedence-Based Memory Models. WDAG 1997: 215-229 - 1996
- [c3]Tsvetomir P. Petrov, Anna Pogosyants, Stephen J. Garland, Victor Luchangco, Nancy A. Lynch:
Computer-Assisted Verification of an Algorithm for Concurrent Timestamps. FORTE 1996: 29-44 - [c2]Alan D. Fekete, David Gupta, Victor Luchangco, Nancy A. Lynch, Alexander A. Shvartsman
Eventually-Serializable Data Services. PODC 1996: 300-309 - 1994
- [c1]Victor Luchangco, Ekrem Söylemez, Stephen J. Garland, Nancy A. Lynch:
Verifying timing properties of concurrent algorithms. FORTE 1994: 259-273
Coauthor Index
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