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Chi-Lun Lo
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2010 – 2019
- 2017
- [j4]Chi-Lun Lo, Chi-Hua Chen
, Ta-Sheng Kuan, Kuen-Rong Lo, Hsun-Jung Cho:
Fuel Consumption Estimation System and Method with Lower Cost. Symmetry 9(7): 105 (2017) - [c4]Chi-Lun Lo, Chi-Hua Chen
A Fuel-Efficient Route Plan App Based on Game Theory. IoTaaS 2017: 126-135 - 2015
- [j3]Stacy Ho, Chi-Lun Lo, Jiayun Ru, Jialin Zhao:
A 23 mW, 73 dB Dynamic Range, 80 MHz BW Continuous-Time Delta-Sigma Modulator in 20 nm CMOS. IEEE J. Solid State Circuits 50(4): 908-919 (2015) - [j2]Chen-Yen Ho, Cong Liu, Chi-Lun Lo, Hung-Chieh Tsai, Tze-Chien Wang, Yu-Hsin Lin:
A 4.5 mW CT Self-Coupled ΔΣ Modulator With 2.2 MHz BW and 90.4 dB SNDR Using Residual ELD Compensation. IEEE J. Solid State Circuits 50(12): 2870-2879 (2015) - [c3]Chen-Yen Ho, Cong Liu, Chi-Lun Lo, Hung-Chieh Tsai, Tze-Chien Wang, Yu-Hsin Lin:
15.2 A 4.5mW CT self-coupled ΔΣ modulator with 2.2MHz BW and 90.4dB SNDR using residual ELD compensation. ISSCC 2015: 1-3 - 2014
- [c2]Stacy Ho, Chi-Lun Lo, Zhiyu Ru, Jialin Zhao:
A 23mW, 73dB dynamic range, 80MHz BW continuous-time delta-sigma modulator in 20nm CMOS. VLSIC 2014: 1-2 - 2013
- [j1]Hung-Chieh Tsai, Chi-Lun Lo, Chen-Yen Ho, Yu-Hsin Lin:
A 64-fJ/Conv.-Step Continuous-Time Sigma Delta Modulator in 40-nm CMOS Using Asynchronous SAR Quantizer and Digital Delta Sigma Truncator. IEEE J. Solid State Circuits 48(11): 2637-2648 (2013) - 2011
- [c1]Chia-Hsin Wu, Wen-Chieh Tsai, Chun-Geik Tan, Chun-Nan Chen, Kuan-I Li, Jui-Lin Hsu, Chi-Lun Lo, Hsin-Hua Chen, Sheng-Yuan Su, Kun-Tso Chen, Min Chen, Osama Shana'a
A GPS/Galileo SoC with adaptive in-band blocker cancellation in 65nm CMOS. ISSCC 2011: 462-464
Coauthor Index
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