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Chenggong Wan
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2020 – today
- 2024
- [j5]Lixia Zheng
, Yi Zhu, Huiyong Xian, Jinwen Li, Chenggong Wan, Jin Wu, Weifeng Sun:
A Low-Power Capacitorless LDO Regulator with Transient Enhancement Structure. J. Circuits Syst. Comput. 33(3) (2024) - [j4]Lixia Zheng
High-Precision GRO-Based ROIC Adopting Sliding Scale Average Method for SPAD Array. IEEE Trans. Circuits Syst. II Express Briefs 71(9): 4151-4155 (2024) - 2023
- [j3]Jin Wu, Minwei Hu, Xudong Wu, Yang Zuo, Chenggong Wan, Lixia Zheng
A low jitter fractional PLL with offset current charge pump. Microelectron. J. 138: 105833 (2023) - [c2]Minwei Hu, Jin Wu, Chenggong Wan, Lixia Zheng:
A Region of Interest Technique for Event Driven Typed SPAD Readout Circuit. ASICON 2023: 1-4 - [c1]Chenggong Wan, Lixia Zheng, Jin Wu:
A SPAD Relative Address Coding for Lateral Resolution Improvement in Coincidence Detection. ASICON 2023: 1-4 - 2022
- [j2]Jin Wu, Jinwen Li, Xudong Wu, Chenggong Wan
A 0.8-3.2 GHz PLL with wide frequency division ratio range. Microelectron. J. 128: 105579 (2022) - [j1]Jin Wu
High-Precision Time Interval Measurement Method Based on Sliding Scaled Time-to-Digital Conversion Circuit. IEEE Trans. Instrum. Meas. 71: 1-9 (2022)
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