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Chaolin Rao
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2020 – today
- 2024
- [j5]Kangjie Long
, Chaolin Rao
FPGA Accelerator for Human Activity Recognition Based on Radar. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1441-1445 (2024) - [c7]Zhechen Yuan, Binzhe Yuan, Yuhan Gu, Yueyang Zheng, Yunxiang He, Xuexin Wang, Chaolin Rao, Pingqiang Zhou, Jingyi Yu, Xin Lou:
A 0.59μJ/pixel High-throughput Energy-efficient Neural Volume Rendering Accelerator on FPGA. CICC 2024: 1-2 - 2023
- [j4]Chaolin Rao
An Energy-Efficient Accelerator for Medical Image Reconstruction From Implicit Neural Representation. IEEE Trans. Circuits Syst. I Regul. Pap. 70(4): 1625-1638 (2023) - [j3]Kangjie Long
Analysis and Design of Precision-Scalable Computation Array for Efficient Neural Radiance Field Rendering. IEEE Trans. Circuits Syst. I Regul. Pap. 70(11): 4260-4270 (2023) - [j2]Ling Zhang
Low-Power Reconfigurable FIR Filter Design Based on Common Operation Sharing. IEEE Trans. Circuits Syst. II Express Briefs 70(8): 3169-3173 (2023) - [c6]Haochuan Wan
A Systolic Array with Activation Stationary Dataflow for Deep Fully-Connected Networks. AICAS 2023: 1-5 - 2022
- [j1]Chaolin Rao, Huangjie Yu, Haochuan Wan
ICARUS: A Specialized Architecture for Neural Radiance Fields Rendering. ACM Trans. Graph. 41(6): 234:1-234:14 (2022) - [c5]Kangjie Long, Chaolin Rao, Xiangyu Zhang, Wen Bin Ye, Xin Lou:
FPGA Accelerator for Radar-Based Human Activity Recognition. AICAS 2022: 391-394 - [c4]Chaolin Rao, Haochuan Wan
An Energy Efficient Precision Scalable Computation Array for Neural Radiance Field Accelerator. APCCAS 2022: 260-264 - [c3]Haochuan Wan
SME: A Systolic Multiply-accumulate Engine for MLP-based Neural Network. APCCAS 2022: 270-274 - [c2]Chaolin Rao, Yueyang Zheng, Haochuan Wan
A Multi-precision Multiply-Accumulation Array. ISOCC 2022: 183-184 - [c1]Yueyang Zheng, Chaolin Rao, Haochuan Wan
An RRAM-based Neural Radiance Field Processor. SOCC 2022: 1-5 - [i1]Chaolin Rao, Huangjie Yu, Haochuan Wan, Jindong Zhou, Yueyang Zheng, Yu Ma, Anpei Chen, Minye Wu, Binzhe Yuan, Pingqiang Zhou, Xin Lou, Jingyi Yu:
ICARUS: A Lightweight Neural Plenoptic Rendering Architecture. CoRR abs/2203.01414 (2022)
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last updated on 2024-10-07 22:12 CEST by the dblp team
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