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Michael Canesche
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2020 – today
- 2024
- [j11]Ricardo S. Ferreira
, Michael Canesche
Examples and tutorials on using Google Colab and Gradio to create online interactive student-learning modules. Comput. Appl. Eng. Educ. 32(4) (2024) - [j10]Ricardo S. Ferreira
AIoT tool integration for enriching teaching resources and monitoring student engagement. Internet Things 26: 101045 (2024) - [j9]Michael Canesche
The Droplet Search Algorithm for Kernel Scheduling. ACM Trans. Archit. Code Optim. 21(2): 35 (2024) - [i2]Michael Canesche, Gaurav Verma, Fernando Magno Quintão Pereira:
Explore as a Storm, Exploit as a Raindrop: On the Benefit of Fine-Tuning Kernel Schedulers with Coordinate Descent. CoRR abs/2406.20037 (2024) - 2023
- [j8]Lucas Bragança
Fast flow cloud: A stream dataflow framework for cloud FPGA accelerator overlays at runtime. Concurr. Comput. Pract. Exp. 35(17) (2023) - [j7]Westerley Carvalho
Heterogeneous reconfigurable architectures for machine learning dataflows. Concurr. Comput. Pract. Exp. 35(17) (2023) - [j6]Leonardo Fagundes-Junior
High-performance graphics processing unit-based strategy for tuning a unmanned aerial vehicle controller subject to time-delay constraints. Concurr. Comput. Pract. Exp. 35(24) (2023) - [j5]Jeronimo Costa Penha
Gene regulatory accelerators on cloud FPGA. Concurr. Comput. Pract. Exp. 35(24) (2023) - [j4]Luigi Soares
Side-channel Elimination via Partial Control-flow Linearization. ACM Trans. Program. Lang. Syst. 45(2): 13:1-13:43 (2023) - [c11]Thaís Damásio, Michael Canesche, Vinícius Pacheco, Marcus Botacin, Anderson Faustino da Silva, Fernando Magno Quintão Pereira:
A Game-Based Framework to Compare Program Classifiers and Evaders. CGO 2023: 108-121 - [c10]Stefan T. Couperus Leal, Michael Canesche, Omar P. Vilela Neto, Ricardo S. Ferreira, José A. M. Nacif:
A Non-Blocking Multistage Interconnection using Regular Clock Schemes for QCA Circuits. SBCCI 2023: 1-6 - [i1]Michael Canesche, Roland Leissa, Fernando Magno Quintão Pereira:
Preparing Reproducible Scientific Artifacts using Docker. CoRR abs/2308.14122 (2023) - 2022
- [c9]Michael Canesche, Ricardo S. Ferreira, José Augusto Miranda Nacif, Fernando Magno Quintão Pereira
A polynomial time exact solution to the bit-aware register binding problem. CC 2022: 29-40 - [c8]Thaís Damásio, Michael Canesche, Vinícius Pacheco, Anderson Faustino da Silva, Fernando Magno Quintão Pereira:
Impacto de Ofuscadores e Otimizadores de Código na Acurácia de Classificadores de Programas. SBLP 2022: 68-75 - 2021
- [j3]Michael Canesche
TRAVERSAL: A Fast and Adaptive Graph-Based Placement and Routing for CGRAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(8): 1600-1612 (2021) - [j2]Michael Canesche, Westerley Carvalho, Lucas Reis, Matheus Aguilar de Oliveira, Salles V. G. Magalhães, Peter Jamieson, José Augusto Miranda Nacif, Ricardo Ferreira:
You Only Traverse Twice: A YOTT Placement, Routing, and Timing Approach for CGRAs. ACM Trans. Embed. Comput. Syst. 20(5s): 52:1-52:25 (2021) - [c7]Michael Canesche, Lucas Bragança
Google Colab CAD4U: Hands-On Cloud Laboratories for Digital Design. ISCAS 2021: 1-5 - [c6]Maria D. Vieira, Michael Canesche, Lucas Bragança
RESHAPE: A Run-Time Dataflow Hardware-Based Mapping for CGRA Overlays. ISCAS 2021: 1-5 - [c5]Lucas Bragança
An Open Source Custom K-means Generator for AWS Cloud FPGA Accelerators. SBESC 2021: 1-8 - 2020
- [c4]Westerley Carvalho, Michael Canesche, Lucas Reis, Frank Sill Torres, Lucas B. da Silva, Peter Jamieson, José Augusto Miranda Nacif, Ricardo S. Ferreira:
A Design Exploration of Scalable Mesh-based Fully Pipelined Accelerators. FPT 2020: 233-236 - [c3]Fernando Passe, Michael Canesche, Omar Paranaiba Vilela Neto, José Augusto Miranda Nacif, Ricardo S. Ferreira:
Mind the Gap: Bridging Verilog and Computer Architecture. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j1]Lucas Bragança da Silva, Ricardo S. Ferreira, Michael Canesche, Marcelo M. Menezes, Maria D. Vieira, Jeronimo Costa Penha
READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications. ACM Trans. Embed. Comput. Syst. 18(5s): 56:1-56:20 (2019) - 2018
- [c2]Ricardo Ferreira, Michael Canesche, Kristtopher Coelho, José Augusto Miranda Nacif:
Minimum Switching Networks. SBESC 2018: 225-230 - [c1]Jeronimo Costa Penha
A GPU/FPGA-Based K-Means Clustering Using a Parameterized Code Generator. WSCAD 2018: 61-69
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last updated on 2024-11-15 20:35 CET by the dblp team
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