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Junichi Sakamoto
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2020 – today
- 2024
- [j7]Junichi Sakamoto
, Daisuke Fujimoto
High-Throughput Bilinear Pairing Processor for Server-Side FPGA Applications. IEEE Trans. Very Large Scale Integr. Syst. 32(8): 1498-1511 (2024) - 2023
- [j6]Kentaro Imafuku
Non-Profiled Deep Learning-Based Side-Channel Analysis With Only One Network Training. IEEE Access 11: 83221-83231 (2023) - [j5]Tsutomu Matsumoto, Junichi Sakamoto, Manami Suzuki, Dai Watanabe, Naoki Yoshida:
A Trial to Embed RAM Encryption Scheme in Cryptographic Programs. J. Inf. Process. 31: 700-707 (2023) - [c8]Shungo Hayashi
Effective Layout Design for Laser Fault Sensor on FPGA. ASHES@CCS 2023: 103-112 - [c7]Junichi Sakamoto, Kazuki Tachibana, Tsutomu Matsumoto:
Application of Profiled Analysis to ADC-Based Remote Side-Channel Attacks. BigDataSecurity/HPSC/IDS 2023: 115-121 - 2022
- [j4]Junichi Sakamoto
Constructing software countermeasures against instruction manipulation attacks: an approach based on vulnerability evaluation using fault simulator. Clust. Comput. 25(4): 2739-2753 (2022) - [c6]Zihao Song, Junichi Sakamoto, Shigeo Mitsunari, Naoki Yoshida, Riku Anzai, Tsutomu Matsumoto:
Efficient Software Implementation of GMT6-672 and GMT8-542 Pairing-Friendly Curves for a 128-Bit Security Level. ACNS Workshops 2022: 461-478 - 2021
- [j3]Manami Suzuki
Key Agreement Over Inter-Process Communication. IEEE Access 9: 137367-137383 (2021) - 2020
- [j2]Junichi Sakamoto, Daisuke Fujimoto, Tsutomu Matsumoto:
Laser-Induced Controllable Instruction Replacement Fault Attack. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 103-A(1): 11-20 (2020) - [j1]Tsutomu Matsumoto, Ryo Miyachi, Junichi Sakamoto, Manami Suzuki, Dai Watanabe, Naoki Yoshida:
RAM Encryption Mechanism without Hardware Support. J. Inf. Process. 28: 473-480 (2020) - [c5]Junichi Sakamoto, Shungo Hayashi, Daisuke Fujimoto, Tsutomu Matsumoto:
How to Code Data Integrity Verification Secure Against Single-Spot-Laser-Induced Instruction Manipulation Attacks. AICCSA 2020: 1-8
2010 – 2019
- 2019
- [c4]Junichi Sakamoto, Yusuke Nagahama, Daisuke Fujimoto, Yota Okuaki, Tsutomu Matsumoto:
Low-Latency Pairing Processor Architecture Using Fully-Unrolled Quotient Pipelining Montgomery Multiplier. AsianHOST 2019: 1-6 - 2016
- [c3]Junichi Sakamoto, Daisuke Fujimoto, Tsutomu Matsumoto:
Laser irradiation on EEPROM sense amplifiers enhances side-channel leakage of read bits. AsianHOST 2016: 1-6
2000 – 2009
- 2006
- [c2]Hirokazu Miura, Junichi Sakamoto, Noriyuki Matsuda, Hirokazu Taki, Noriyuki Abe, Satoshi Hori:
Adequate RSSI Determination Method by Making Use of SVM for Indoor Localization. KES (2) 2006: 628-636 - 2005
- [c1]Junichi Sakamoto, Hirokazu Miura, Noriyuki Matsuda, Hirokazu Taki, Noriyuki Abe, Satoshi Hori:
Indoor Location Determination Using a Topological Model. KES (4) 2005: 143-149
Coauthor Index
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