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Yingjie Qi
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2020 – today
- 2024
- [j3]Yingjie Qi
, Jianlei Yang
Architectural Implications of GNN Aggregation Programming Abstractions. IEEE Comput. Archit. Lett. 23(1): 125-128 (2024) - [j2]Cenlin Duan
DDC-PIM: Efficient Algorithm/Architecture Co-Design for Doubling Data Capacity of SRAM-Based Processing-in-Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 906-918 (2024) - [c9]Ao Zhou, Jianlei Yang, Tong Qiao, Yingjie Qi, Zhi Yang, Weisheng Zhao, Chunming Hu:
Graph Neural Networks Automated Design and Deployment on Device-Edge Co-Inference Systems. DAC 2024: 187:1-187:6 - [c8]Cenlin Duan, Jianlei Yang, Yiou Wang, Yikun Wang, Yingjie Qi, Xiaolin He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weisheng Zhao:
Towards Efficient SRAM-PIM Architecture Design by Exploiting Unstructured Bit-Level Sparsity. DAC 2024: 209:1-209:6 - [c7]Tong Qiao, Jianlei Yang, Yingjie Qi, Ao Zhou, Chen Bai, Bei Yu, Weisheng Zhao, Chunming Hu:
GNNavigator: Towards Adaptive Training of Graph Neural Networks via Automatic Guideline Exploration. DAC 2024: 239:1-239:6 - [i10]Ao Zhou, Jianlei Yang, Tong Qiao, Yingjie Qi, Zhi Yang, Weisheng Zhao, Chunming Hu:
Graph Neural Networks Automated Design and Deployment on Device-Edge Co-Inference Systems. CoRR abs/2404.05605 (2024) - [i9]Cenlin Duan, Jianlei Yang, Yiou Wang, Yikun Wang, Yingjie Qi, Xiaolin He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weisheng Zhao:
Towards Efficient SRAM-PIM Architecture Design by Exploiting Unstructured Bit-Level Sparsity. CoRR abs/2404.09497 (2024) - [i8]Tong Qiao, Jianlei Yang, Yingjie Qi, Ao Zhou, Chen Bai, Bei Yu, Weisheng Zhao, Chunming Hu:
GNNavigator: Towards Adaptive Training of Graph Neural Networks via Automatic Guideline Exploration. CoRR abs/2404.09544 (2024) - [i7]Ao Zhou, Jianlei Yang, Yingjie Qi, Tong Qiao, Yumeng Shi, Cenlin Duan, Weisheng Zhao, Chunming Hu:
HGNAS: Hardware-Aware Graph Neural Architecture Search for Edge Devices. CoRR abs/2408.12840 (2024) - 2023
- [c6]Ao Zhou
Hardware-Aware Graph Neural Network Automated Design for Edge Computing Platforms. DAC 2023: 1-6 - [i6]Ao Zhou, Jianlei Yang, Yingjie Qi, Yumeng Shi, Tong Qiao, Weisheng Zhao, Chunming Hu:
Hardware-Aware Graph Neural Network Automated Design for Edge Computing Platforms. CoRR abs/2303.10875 (2023) - [i5]Yingjie Qi, Jianlei Yang, Ao Zhou, Tong Qiao, Chunming Hu:
Architectural Implications of GNN Aggregation Programming Abstractions. CoRR abs/2310.12184 (2023) - [i4]Cenlin Duan, Jianlei Yang, Xiaolin He, Yingjie Qi, Yikun Wang, Yiou Wang, Ziyan He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weitao Pan, Weisheng Zhao:
DDC-PIM: Efficient Algorithm/Architecture Co-design for Doubling Data Capacity of SRAM-based Processing-In-Memory. CoRR abs/2310.20424 (2023) - 2022
- [c5]Mingjun Li, Jianlei Yang, Yingjie Qi, Meng Dong, Yuhao Yang, Runze Liu, Weitao Pan, Bei Yu, Weisheng Zhao:
Eventor: an efficient event-based monocular multi-view stereo accelerator on FPGA platform. DAC 2022: 331-336 - [i3]Mingjun Li, Jianlei Yang, Yingjie Qi, Meng Dong, Yuhao Yang, Runze Liu, Weitao Pan, Bei Yu, Weisheng Zhao:
Eventor: An Efficient Event-Based Monocular Multi-View Stereo Accelerator on FPGA Platform. CoRR abs/2203.15439 (2022) - 2021
- [j1]Zhao Yang, Yingjie Qi:
Rapid analysis and detection algorithm and prevention countermeasures of urban traffic accidents under artificial intelligence. Int. J. Grid Util. Comput. 12(4): 431-439 (2021) - [c4]Ao Zhou
Brief Industry Paper: optimizing Memory Efficiency of Graph Neural Networks on Edge Computing Platforms. RTAS 2021: 445-448 - [i2]Ao Zhou, Jianlei Yang, Yeqi Gao, Tong Qiao, Yingjie Qi, Xiaoyi Wang, Yunli Chen, Pengcheng Dai, Weisheng Zhao, Chunming Hu:
Optimizing Memory Efficiency of Graph Neural Networks on Edge Computing Platforms. CoRR abs/2104.03058 (2021) - 2020
- [c3]Xueyan Wang, Jianlei Yang, Yinglin Zhao, Yingjie Qi, Meichen Liu, Xingzhou Cheng, Xiaotao Jia, Xiaoming Chen, Gang Qu, Weisheng Zhao:
TCIM: Triangle Counting Acceleration With Processing-In-MRAM Architecture. DAC 2020: 1-6 - [c2]Xucheng Ye, Pengcheng Dai, Junyu Luo
Accelerating CNN Training by Pruning Activation Gradients. ECCV (25) 2020: 322-338 - [i1]Xueyan Wang, Jianlei Yang, Yinglin Zhao, Yingjie Qi, Meichen Liu, Xingzhou Cheng, Xiaotao Jia, Xiaoming Chen, Gang Qu, Weisheng Zhao:
TCIM: Triangle Counting Acceleration With Processing-In-MRAM Architecture. CoRR abs/2007.10702 (2020)
2000 – 2009
- 2008
- [c1]Zongrui Ding, Guopeng Ding, Yingjie Qi, Limin Xiao, Jing Wang:
Utility-based adaptive multi-frame iterative algorithm for resource scheduling in OFDMA networks. ICT 2008: 1-6
Coauthor Index
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