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Alexander Dörflinger
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2020 – today
- 2023
- [b1]Alexander Dörflinger:
Fault Tolerance and Hardware Acceleration for Automotive and Aerospace Computing Architectures (Fehlertoleranz und Hardwarebeschleunigung für Rechnerarchitekturen im Automobilbereich sowie der Luft- und Raumfahrt). Braunschweig University of Technology, Germany, 2023 - 2022
- [c9]Alexander Dörflinger, Benedikt Kleinbeck, Mark Albers, Harald Michalik, Martin Moya:
A Framework for Fault Tolerance in RISC-V. DASC/PiCom/CBDCom/CyberSciTech 2022: 1-8 - 2021
- [c8]Alexander Dörflinger, Mark Albers, Benedikt Kleinbeck, Yejun Guan, Harald Michalik, Raphael Klink, Christopher Blochwitz, Anouar Nechi
, Mladen Berekovic
A comparative survey of open-source application-class RISC-V processor implementations. CF 2021: 12-20 - 2020
- [c7]Alexander Dörflinger, Yejun Guan, Sören Michalik, Sönke Michalik, Jamin Naghmouchi, Harald Michalik:
ECC Memory for Fault Tolerant RISC-V Processors. ARCS 2020: 44-55
2010 – 2019
- 2019
- [c6]Mischa Möstl, Alexander Dörflinger, Mark Albers, Harald Michalik, Rolf Ernst:
Self-Adaptation for Availability in CPU-FPGA Systems Under Soft Errors. AHS 2019: 9-16 - [c5]Alexander Dörflinger, Mark Albers, Björn Fiethe, Harald Michalik, Mischa Möstl, Johannes Schlatow
Demonstrating Controlled Change for Autonomous Space Vehicles. AHS 2019: 95-102 - 2018
- [c4]Alexander Dörflinger, Mark Albers, Johannes Schlatow
Hardware and Software Task Scheduling for ARM-FPGA Platforms. AHS 2018: 66-73 - [c3]Alexander Dörflinger, Mark Albers, Björn Fiethe, Harald Michalik:
Hardware Acceleration in Genode OS Using Dynamic Partial Reconfiguration. ARCS 2018: 283-293 - 2017
- [c2]Holger Michel, Hipólito Guzmán-Miranda
SEU fault classification by fault injection for an FPGA in the space instrument SOPHI. AHS 2017: 9-15 - [c1]Alexander Dörflinger, Björn Fiethe, Harald Michalik, Sándor P. Fekete, Phillip Keldenich, Christian Scheffer:
Resource-efficient dynamic partial reconfiguration on FPGAs for space instruments. AHS 2017: 24-31
Coauthor Index
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