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Arnab Kumar Biswas
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2020 – today
- 2024
- [c5]Praveen K, Gabriel Anand K. S, Indranil Ghosh Ray, Avishek Adhikari, Sabyasachi Datta, Arnab Kumar Biswas
:
On the Design of a Searchable Encryption Protocol for Keyword Search using Proactive Secret Sharing. e-Science 2024: 1-8 - 2022
- [j12]Arnab Kumar Biswas
Protecting Network-on-Chip Intellectual Property Using Timing Channel Fingerprinting. ACM Trans. Embed. Comput. Syst. 21(2): 17:1-17:21 (2022) - [j11]Arnab Kumar Biswas
Using Pattern of On-Off Routers and Links and Router Delays to Protect Network-on-Chip Intellectual Property. ACM Trans. Comput. Syst. 40: 2:1-2:19 (2022) - 2021
- [j10]Arnab Kumar Biswas
Cryptographic Software IP Protection without Compromising Performance or Timing Side-channel Leakage. ACM Trans. Archit. Code Optim. 18(2): 20:1-20:20 (2021) - [j9]Arnab Kumar Biswas
Attacks Toward Wireless Network-on-Chip and Countermeasures. IEEE Trans. Emerg. Top. Comput. 9(2): 692-706 (2021) - 2020
- [j8]Arnab Kumar Biswas
Network-on-Chip Intellectual Property Protection Using Circular Path-based Fingerprinting. ACM J. Emerg. Technol. Comput. Syst. 17(1): 4:1-4:22 (2020) - [j7]Sai Praveen Kadiyala, Manaar Alam
LAMBDA: Lightweight Assessment of Malware for emBeddeD Architectures. ACM Trans. Embed. Comput. Syst. 19(4): 23:1-23:31 (2020) - [j6]Guanhua Wang
KLEESpectre: Detecting Information Leakage through Speculative Cache Attacks via Symbolic Execution. ACM Trans. Softw. Eng. Methodol. 29(3): 14:1-14:31 (2020)
2010 – 2019
- 2019
- [i4]Guanhua Wang, Sudipta Chattopadhyay, Arnab Kumar Biswas, Tulika Mitra, Abhik Roychoudhury:
KLEESPECTRE: Detecting Information Leakage through Speculative Cache Attacks via Symbolic Execution. CoRR abs/1909.00647 (2019) - 2018
- [j5]Arnab Kumar Biswas
Efficient Timing Channel Protection for Hybrid (Packet/Circuit-Switched) Network-on-Chip. IEEE Trans. Parallel Distributed Syst. 29(5): 1044-1057 (2018) - [c4]Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre
A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug components. AsianHOST 2018: 92-97 - [c3]Thinh Hung Pham
CIDPro: Custom Instructions for Dynamic Program Diversification. FPL 2018: 224-229 - [c2]Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Arnab Kumar Biswas
A small and adaptive coprocessor for information flow tracking in ARM SoCs. ReConFig 2018: 1-8 - [i3]Thinh Hung Pham, Alexander Fell, Arnab Kumar Biswas, Siew-Kei Lam, Nandeesha Veeranna:
CIDPro: Custom Instructions for Dynamic Program Diversification. CoRR abs/1809.01221 (2018) - [i2]Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Arnab Kumar Biswas, Vianney Lapôtre, Guy Gogniat:
A small and adaptive coprocessor for information flow tracking in ARM SoCs. CoRR abs/1812.01541 (2018) - [i1]Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Arnab Kumar Biswas, Vianney Lapôtre, Guy Gogniat:
A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug components. CoRR abs/1812.01667 (2018) - 2017
- [j4]Arnab Kumar Biswas
A Survey of Timing Channels and Countermeasures. ACM Comput. Surv. 50(1): 6:1-6:39 (2017) - 2016
- [j3]Arnab Kumar Biswas
Source Authentication Techniques for Network-on-Chip Router Configuration Packets. ACM J. Emerg. Technol. Comput. Syst. 13(2): 28:1-28:31 (2016) - [j2]Arnab Kumar Biswas
Role based shared memory access control mechanisms in NoC based MP-SoC. Nano Commun. Networks 7: 46-64 (2016) - 2015
- [j1]Arnab Kumar Biswas
Router Attack toward NoC-enabled MPSoC and Monitoring Countermeasures against such Threat. Circuits Syst. Signal Process. 34(10): 3241-3290 (2015) - 2011
- [c1]Arnab Kumar Biswas
A Proposed Output Buffer at 90 nm Technology with Minimum Signal Switching Noise at 83.3MHz. ISVLSI 2011: 108-113
Coauthor Index
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last updated on 2024-10-07 22:13 CEST by the dblp team
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