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Anuj Pathania
Person information
- affiliation: University of Amsterdam, The Netherlands
- affiliation (PhD 2018): Karlsruhe Institute of Technology, Germany
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2020 – today
- 2024
- [c27]Saeedeh Baneshi, Anuj Pathania, Benny Akesson, Andy D. Pimentel, Ana Lucia Varbanescu:
Analyzing Per-Application Energy Consumption in a Multi-Application Computing Continuum. FMEC 2024: 30-37 - [c26]Ehsan Aghapour, Yixian Shen, Dolly Sapra, Andy D. Pimentel, Anuj Pathania:
PiQi: Partially Quantized DNN Inference on HMPSoCs. ISLPED 2024: 1-6 - 2023
- [j16]Yixian Shen, Leo Schreuders, Anuj Pathania, Andy D. Pimentel:
Thermal Management for 3D-Stacked Systems via Unified Core-Memory Power Regulation. ACM Trans. Embed. Comput. Syst. 22(5s): 120:1-120:26 (2023) - [c25]Yixian Shen, Sobhan Niknam, Anuj Pathania, Andy D. Pimentel:
Thermal Management for S-NUCA Many-Cores via Synchronous Thread Rotations. DATE 2023: 1-6 - [c24]Sobhan Niknam, Yixian Shen, Anuj Pathania, Andy D. Pimentel:
3D-TTP: Efficient Transient Temperature-Aware Power Budgeting for 3D-Stacked Processor-Memory Systems. ISVLSI 2023: 1-6 - [c23]Sudam Maduranga Wasala, Sobhan Niknam, Anuj Pathania, Clemens Grelck, Andy D. Pimentel:
Lifetime Estimation for Core-Failure Resilient Multi-Core Processors. MCSoC 2023: 293-300 - [c22]Ehsan Aghapour, Dolly Sapra, Andy D. Pimentel, Anuj Pathania:
PELSI: Power-Efficient Layer-Switched Inference. RTCSA 2023: 12-17 - [c21]Saeedeh Baneshi, Ana Lucia Varbanescu, Anuj Pathania, Benny Akesson, Andy D. Pimentel:
Analyzing Digital Services Across the Compute Continuum Using iFogSim. RTCSA 2023: 279-280 - [c20]Ana Lucia Varbanescu, Stephen Nicholas Swatman, Anuj Pathania:
Performance Engineering for Graduate Students: a View from Amsterdam. SC Workshops 2023: 357-365 - [c19]Saeedeh Baneshi, Ana Lucia Varbanescu, Anuj Pathania, Benny Akesson, Andy D. Pimentel:
Estimating the Energy Consumption of Applications in the Computing Continuum with iFogSim. ISC Workshops 2023: 234-249 - 2022
- [j15]Lokesh Siddhu, Rajesh Kedia, Shailja Pandey, Martin Rapp, Anuj Pathania, Jörg Henkel, Preeti Ranjan Panda:
CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems. ACM Trans. Archit. Code Optim. 19(3): 44:1-44:25 (2022) - [j14]Zhaoying Li, Dhananjaya Wijerathne, Xianzhang Chen, Anuj Pathania, Tulika Mitra:
ChordMap: Automated Mapping of Streaming Applications Onto CGRA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(2): 306-319 (2022) - [j13]Dhananjaya Wijerathne, Zhaoying Li, Anuj Pathania, Tulika Mitra, Lothar Thiele:
HiMap: Fast and Scalable High-Quality Mapping on CGRA via Hierarchical Abstraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(10): 3290-3303 (2022) - [c18]Ehsan Aghapour, Dolly Sapra, Andy D. Pimentel, Anuj Pathania:
CPU-GPU Layer-Switched Low Latency CNN Inference. DSD 2022: 324-331 - 2021
- [j12]Sami Salamin, Martin Rapp, Anuj Pathania, Arka Maity, Jörg Henkel, Tulika Mitra, Hussam Amrouch:
Power-Efficient Heterogeneous Many-Core Design With NCFET Technology. IEEE Trans. Computers 70(9): 1484-1497 (2021) - [j11]Martin Rapp, Anuj Pathania, Tulika Mitra, Jörg Henkel:
Neural Network-Based Performance Prediction for Task Migration on S-NUCA Many-Cores. IEEE Trans. Computers 70(10): 1691-1704 (2021) - [c17]Dhananjaya Wijerathne, Zhaoying Li, Anuj Pathania, Tulika Mitra, Lothar Thiele:
HiMap: Fast and Scalable High-Quality Mapping on CGRA via Hierarchical Abstraction. DATE 2021: 1192-1197 - [c16]Sobhan Niknam, Anuj Pathania, Andy D. Pimentel:
T-TSP: Transient-Temperature Based Safe Power Budgeting in Multi-/Many-Core Processors. ICCD 2021: 500-508 - [i3]Lokesh Siddhu, Rajesh Kedia, Shailja Pandey, Martin Rapp, Anuj Pathania, Jörg Henkel, Preeti Ranjan Panda:
CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems. CoRR abs/2109.12405 (2021) - 2020
- [j10]Siqi Wang, Anuj Pathania, Tulika Mitra:
Neural Network Inference on Mobile SoCs. IEEE Des. Test 37(5): 50-57 (2020) - [j9]Martin Rapp, Mark Sagi, Anuj Pathania, Andreas Herkersdorf, Jörg Henkel:
Power- and Cache-Aware Task Mapping with Dynamic Power Budgeting for Many-Cores. IEEE Trans. Computers 69(1): 1-13 (2020) - [j8]Siqi Wang, Gayathri Ananthanarayanan, Yifan Zeng, Neeraj Goel, Anuj Pathania, Tulika Mitra:
High-Throughput CNN Inference on Embedded ARM Big.LITTLE Multicore Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2254-2267 (2020) - [c15]Alexander Hoffman, Anuj Pathania, Philipp H. Kindt, Samarjit Chakraborty, Tulika Mitra:
BrezeFlow: Unified Debugger for Android CPU Power Governors and Schedulers on Edge Devices. DAC 2020: 1-6 - [c14]Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra:
Unified Thread- and Data-Mapping for Multi-Threaded Multi-Phase Applications on SPM Many-Cores. DATE 2020: 1496-1501
2010 – 2019
- 2019
- [j7]Anuj Pathania, Jörg Henkel:
HotSniper: Sniper-Based Toolchain for Many-Core Thermal Simulations in Open Systems. IEEE Embed. Syst. Lett. 11(2): 54-57 (2019) - [j6]Dhananjaya Wijerathne, Zhaoying Li, Manupa Karunarathne, Anuj Pathania, Tulika Mitra:
CASCADE: High Throughput Data Streaming via Decoupled Access-Execute CGRA. ACM Trans. Embed. Comput. Syst. 18(5s): 50:1-50:26 (2019) - [c13]Martin Rapp, Anuj Pathania, Tulika Mitra, Jörg Henkel:
Prediction-Based Task Migration on S-NUCA Many-Cores. DATE 2019: 1579-1582 - [c12]Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra:
Scalable Optimal Greedy Scheduler for Asymmetric Multi-/Many-Core Processors. SAMOS 2019: 127-141 - [i2]Siqi Wang, Gayathri Ananthanarayanan, Yifan Zeng, Neeraj Goel, Anuj Pathania, Tulika Mitra:
High-Throughput CNN Inference on Embedded ARM big.LITTLE Multi-Core Processors. CoRR abs/1903.05898 (2019) - [i1]Siqi Wang, Anuj Pathania, Tulika Mitra:
Neural Network Inference on Mobile SoCs. CoRR abs/1908.11450 (2019) - 2018
- [b1]Anuj Pathania:
Scalable Task Schedulers for Many-Core Architectures. Karlsruhe Institute of Technology, Germany, 2018 - [c11]Anuj Pathania, Heba Khdr, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
QoS-aware stochastic power management for many-cores. DAC 2018: 69:1-69:6 - [c10]Anuj Pathania, Jörg Henkel:
Task scheduling for many-cores with S-NUCA caches. DATE 2018: 557-562 - [c9]Martin Rapp, Anuj Pathania, Jörg Henkel:
Pareto-Optimal Power- and Cache-Aware Task Mapping for Many-Cores with Distributed Shared Last-Level Cache. ISLPED 2018: 16:1-16:6 - [c8]Vanchinathan Venkataramani, Anuj Pathania, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Scalable Dynamic Task Scheduling on Adaptive Many-Core. MCSoC 2018: 168-175 - 2017
- [j5]Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Defragmentation of Tasks in Many-Core Architecture. ACM Trans. Archit. Code Optim. 14(1): 2:1-2:21 (2017) - [j4]Heba Khdr, Santiago Pagani, Éricles Sousa, Vahid Lari, Anuj Pathania, Frank Hannig, Muhammad Shafique, Jürgen Teich, Jörg Henkel:
Power Density-Aware Resource Management for Heterogeneous Tiled Multicores. IEEE Trans. Computers 66(3): 488-501 (2017) - [j3]Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Optimal Greedy Algorithm for Many-Core Scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(6): 1054-1058 (2017) - [j2]Santiago Pagani, Anuj Pathania, Muhammad Shafique, Jian-Jia Chen, Jörg Henkel:
Energy Efficiency for Clustered Heterogeneous Multicores. IEEE Trans. Parallel Distributed Syst. 28(5): 1315-1330 (2017) - [c7]Anuj Pathania, Heba Khdr, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Scalable probabilistic power budgeting for many-cores. DATE 2017: 864-869 - 2016
- [j1]Santiago Pagani, Lars Bauer, Qingqing Chen, Elisabeth Glocker, Frank Hannig, Andreas Herkersdorf, Heba Khdr, Anuj Pathania, Ulf Schlichtmann, Doris Schmitt-Landsiedel, Mark Sagi, Éricles Sousa, Philipp Wagner, Volker Wenzel, Thomas Wild, Jörg Henkel:
Dark silicon management: an integrated and coordinated cross-layer approach. it Inf. Technol. 58(6): 297-307 (2016) - [c6]Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Distributed scheduling for many-cores using cooperative game theory. DAC 2016: 133:1-133:6 - [c5]Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Distributed fair scheduling for many-cores. DATE 2016: 379-384 - 2015
- [c4]Anuj Pathania, Alexandru Eugen Irimiea, Alok Prakash, Tulika Mitra:
Power-Performance Modelling of Mobile Gaming Workloads on Heterogeneous MPSoCs. DAC 2015: 201:1-201:6 - [c3]Anuj Pathania, Santiago Pagani, Muhammad Shafique, Jörg Henkel:
Power management for mobile games on asymmetric multi-cores. ISLPED 2015: 243-248 - 2014
- [c2]Thannirmalai Somu Muthukaruppan, Anuj Pathania, Tulika Mitra:
Price theory based power management for heterogeneous multi-cores. ASPLOS 2014: 161-176 - [c1]Anuj Pathania, Qing Jiao, Alok Prakash, Tulika Mitra:
Integrated CPU-GPU Power Management for 3D Mobile Games. DAC 2014: 40:1-40:6
Coauthor Index
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last updated on 2024-10-23 21:21 CEST by the dblp team
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