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Xinfeng Xie
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2020 – today
- 2024
- [i8]Zi Yang, Samridhi Choudhary, Xinfeng Xie, Cao Gao, Siegfried Kunzmann, Zheng Zhang:
CoMERA: Computing- and Memory-Efficient Training via Rank-Adaptive Tensor Optimization. CoRR abs/2405.14377 (2024) - 2023
- [j7]Xinfeng Xie
, Peng Gu
MPU: Memory-centric SIMT Processor via In-DRAM Near-bank Computing. ACM Trans. Archit. Code Optim. 20(3): 40:1-40:26 (2023) - 2022
- [b1]Xinfeng Xie:
Efficient In-DRAM Near-Bank Processing for Emerging Parallel Computing Workloads. University of California, Santa Barbara, USA, 2022 - [j6]Xinfeng Xie
MPU-Sim: A Simulator for In-DRAM Near-Bank Processing Architectures. IEEE Comput. Archit. Lett. 21(1): 1-4 (2022) - [j5]Xiaobing Chen
Rubik: A Hierarchical Architecture for Efficient Graph Neural Network Training. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 936-949 (2022) - [c13]Xinfeng Xie, Prakash Prabhu, Ulysse Beaugnon, Phitchaya Mangpo Phothilimthana, Sudip Roy, Azalia Mirhoseini, Eugene Brevdo, James Laudon, Yanqi Zhou:
A Transferable Approach for Partitioning Machine Learning Models on Multi-Chip-Modules. MLSys 2022 - 2021
- [j4]Peng Gu
DLUX: A LUT-Based Near-Bank Accelerator for Data Center Deep Learning Training Workloads. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(8): 1586-1599 (2021) - [c12]Pengfei Zuo, Yu Hua, Ling Liang, Xinfeng Xie, Xing Hu, Yuan Xie:
SEALing Neural Network Models in Encrypted Deep Learning Accelerators. DAC 2021: 1255-1260 - [c11]Xinfeng Xie, Zheng Liang
SpaceA: Sparse Matrix Vector Multiplication on Processing-in-Memory Accelerator. HPCA 2021: 570-583 - [i7]Xinfeng Xie, Peng Gu, Yufei Ding, Dimin Niu, Hongzhong Zheng, Yuan Xie:
MPU: Towards Bandwidth-abundant SIMT Processor via Near-bank Computing. CoRR abs/2103.06653 (2021) - [i6]Xinfeng Xie, Prakash Prabhu, Ulysse Beaugnon, Phitchaya Mangpo Phothilimthana, Sudip Roy, Azalia Mirhoseini, Eugene Brevdo, James Laudon, Yanqi Zhou:
A Transferable Approach for Partitioning Machine Learning Models on Multi-Chip-Modules. CoRR abs/2112.04041 (2021) - 2020
- [j3]Xinfeng Xie
NNBench-X: A Benchmarking Methodology for Neural Network Accelerator Designs. ACM Trans. Archit. Code Optim. 17(4): 31:1-31:25 (2020) - [c10]Xing Hu, Ling Liang, Shuangchen Li, Lei Deng
DeepSniffer: A DNN Model Extraction Framework Based on Learning Architectural Hints. ASPLOS 2020: 385-399 - [c9]Peng Gu
iPIM: Programmable In-Memory Image Processing Accelerator Using Near-Bank Architecture. ISCA 2020: 804-817 - [c8]Abanti Basak, Jilan Lin
SAGA-Bench: Software and Hardware Characterization of Streaming Graph Analytics Workloads. ISPASS 2020: 12-23 - [i5]Pengfei Zuo, Yu Hua, Ling Liang, Xinfeng Xie, Xing Hu, Yuan Xie:
SEALing Neural Network Models in Secure Deep Learning Accelerators. CoRR abs/2008.03752 (2020) - [i4]Xiaobing Chen, Yuke Wang, Xinfeng Xie, Xing Hu, Abanti Basak, Ling Liang, Mingyu Yan, Lei Deng, Yufei Ding, Zidong Du, Yunji Chen, Yuan Xie:
Rubik: A Hierarchical Architecture for Efficient Graph Learning. CoRR abs/2009.12495 (2020)
2010 – 2019
- 2019
- [j2]Xinfeng Xie
NNBench-X: Benchmarking and Understanding Neural Network Workloads for Accelerator Designs. IEEE Comput. Archit. Lett. 18(1): 38-42 (2019) - [c7]Yu Ji, Youyang Zhang, Xinfeng Xie, Shuangchen Li, Peiqi Wang, Xing Hu, Youhui Zhang, Yuan Xie:
FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture. ASPLOS 2019: 733-747 - [c6]Kun Wu
Memory-Bound Proof-of-Work Acceleration for Blockchain Applications. DAC 2019: 177 - [c5]Xinfeng Xie, Xing Hu, Peng Gu, Shuangchen Li, Yu Ji, Yuan Xie:
NNBench-X: A Benchmarking Methodology for Neural Network Accelerator Designs. EMC2@HPCA/CVPR/ISCA 2019: 11-15 - [c4]Abanti Basak, Shuangchen Li, Xing Hu, Sang Min Oh, Xinfeng Xie, Li Zhao, Xiaowei Jiang, Yuan Xie:
Analysis and Optimization of the Memory Hierarchy for Graph Processing Workloads. HPCA 2019: 373-386 - [i3]Peiqi Wang, Dongsheng Wang, Yu Ji, Xinfeng Xie, Haoxuan Song, XuXin Liu, Yongqiang Lyu, Yuan Xie:
QGAN: Quantized Generative Adversarial Networks. CoRR abs/1901.08263 (2019) - [i2]Yu Ji, Youyang Zhang, Xinfeng Xie, Shuangchen Li, Peiqi Wang, Xing Hu, Youhui Zhang, Yuan Xie:
FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture. CoRR abs/1901.09904 (2019) - [i1]Xing Hu, Ling Liang, Lei Deng, Shuangchen Li, Xinfeng Xie, Yu Ji, Yufei Ding, Chang Liu, Timothy Sherwood, Yuan Xie:
Neural Network Model Extraction Attacks in Edge Devices by Hearing Architectural Hints. CoRR abs/1903.03916 (2019) - 2018
- [j1]Xinfeng Xie
Exploiting Sparsity to Accelerate Fully Connected Layers of CNN-Based Applications on Mobile SoCs. ACM Trans. Embed. Comput. Syst. 17(2): 37:1-37:25 (2018) - [c3]Peiqi Wang, Xinfeng Xie, Lei Deng, Guoqi Li, Dongsheng Wang, Yuan Xie:
HitNet: Hybrid Ternary Recurrent Neural Network. NeurIPS 2018: 602-612 - 2017
- [c2]Jie Wang, Xinfeng Xie
Communication Optimization on GPU: A Case Study of Sequence Alignment Algorithms. IPDPS 2017: 72-81 - 2013
- [c1]Xinfeng Xie, Zhongqing Yu, Kaixi Wang:
The design and implementation of the multi-screen interaction service architecture for the Real-Time streaming media. ICNC 2013: 1600-1604
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last updated on 2024-11-05 22:00 CET by the dblp team
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