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M. J. BrightSky
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2020 – today
- 2024
- [c11]Wei-Chih Chien, C. L. Sung, Robert L. Bruce, C. W. Yeh, Huai-Yu Cheng, Z. L. Liu, E. K. Lai, C. W. Cheng, J. X. Zheng, Alexander Grun, A. Ray, D. Daudelin, H. Y. Ho, Matthew BrightSky, H. L. Lung:
A Novel Program-verify Free and Low Drift Multilevel Operation on Cross-point OTS-PCM for In-Memory Computing Application. IMW 2024: 1-4 - [c10]Alexander Grun, Z. L. Lui, C. W. Cheng, D. Piatek, E. K. Lai, Y. T. Kuo, Wei-Chih Chien, S. Cheng, M. J. BrightSky, H. L. Lung, Huai-Yu Cheng:
AsSeGeS and GeN Heterostructures for Superior OTS Performance. IMW 2024: 1-4 - [c9]Wei-Chih Chien, J. X. Zheng, C. W. Yeh, Lynne M. Gignac, H. Y. Cheng, Z. L. Liu, Alexander Grun, C. L. Sung, E. K. Lai, S. Cheng, C. W. Cheng, L. Buzi, A. Ray, Douglas M. Bishop, Robert L. Bruce, M. J. BrightSky, H. L. Lung:
A Novel Chalcogenide Based CuGeSe Selector Only Memory (SOM) for 3D Xpoint and 3D Vertical Memory Applications. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c8]Wei-Chih Chien, E. K. Lai, L. Buzi, C. W. Cheng, C. W. Yeh, A. Ray, Lynne M. Gignac, N. Gong, Huai-Yu Cheng, Alexander Grun, D. Y. Lee, W. Kim, A. Majumdar, Douglas M. Bishop, Robert L. Bruce, D. Daudelin, H. Y. Ho, M. J. BrightSky, H. L. Lung:
A Comprehensive Study on the Pillar Size of OTS-PCM Memory with an Optimized Process and Scaling Trends Down to Sub-10 nm for SCM Applications. IMW 2023: 1-4 - 2022
- [j5]Uicheol Shin
, Masatoshi Ishii
Pattern Training, Inference, and Regeneration Demonstration Using On-Chip Trainable Neuromorphic Chips for Spiking Restricted Boltzmann Machine. Adv. Intell. Syst. 4(8) (2022) - [c7]Wei-Chih Chien, Lynne M. Gignac, Y. C. Chou, C. H. Yang, N. Gong, H. Y. Ho, C. W. Yeh, H. Y. Cheng, W. Kim, I. T. Kuo, E. K. Lai, C. W. Cheng, L. Buzi, A. Ray, Chia-Sheng Hsu, Robert L. Bruce, Matthew BrightSky, H. L. Lung:
Endurance Evaluation on OTS-PCM Device using Constant Current Stress Scheme. IRPS 2022: 7-1 - 2021
- [j4]Riduan Khaddam-Aljameh
A Multi-Memristive Unit-Cell Array With Diagonal Interconnects for In-Memory Computing. IEEE Trans. Circuits Syst. II Express Briefs 68(12): 3522-3526 (2021) - [c6]Robert L. Bruce, Syed Ghazi Sarwat
Mushroom-Type phase change memory with projection liner: An array-level demonstration of conductance drift and noise mitigation. IRPS 2021: 1-6 - [c5]Michele Martemucci
Accurate Weight Mapping in a Multi-Memristive Synaptic Unit. ISCAS 2021: 1-5
2010 – 2019
- 2019
- [c4]Masatoshi Ishii
Performance Analysis of Spiking RBM with Measurement-Based Phase Change Memory Model. ICONIP (5) 2019: 591-599 - [c3]Eduard A. Cartier, Wanki Kim, Nanbo Gong, Tayfun Gokmen, Martin M. Frank, Douglas M. Bishop, Youngseok Kim, Seyoung Kim
Reliability Challenges with Materials for Analog Computing. IRPS 2019: 1-10 - 2018
- [c2]Wanki Kim, SangBum Kim
Reliability benefits of a metallic liner in confined PCM. IRPS 2018: 6 - 2017
- [j3]Win-San Khwa, Meng-Fan Chang, Jau-Yi Wu, Ming-Hsiu Lee, Tzu-Hsiang Su, Keng-Hao Yang, Tien-Fu Chen, Tien-Yen Wang, Hsiang-Pang Li, Matthew J. BrightSky, SangBum Kim
A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications. IEEE J. Solid State Circuits 52(1): 218-228 (2017) - [i4]Jesse H. Engel, Sukru Burc Eryilmaz, SangBum Kim, Matthew BrightSky, Chung Lam, Hsiang-Lan Lung, Bruno A. Olshausen, H.-S. Philip Wong:
Opportunities for Analog Coding in Emerging Memory Systems. CoRR abs/1701.06063 (2017) - 2016
- [j2]Geoffrey W. Burr, Matthew J. BrightSky, Abu Sebastian
Recent Progress in Phase-Change Memory Technology. IEEE J. Emerg. Sel. Topics Circuits Syst. 6(2): 146-162 (2016) - [c1]Win-San Khwa, Meng-Fan Chang, Jau-Yi Wu, Ming-Hsiu Lee, Tzu-Hsiang Su, Keng-Hao Yang, Tien-Fu Chen, Tien-Yen Wang, Hsiang-Pang Li, Matthew BrightSky, SangBum Kim, Hsiang-Lam Lung, Chung Lam:
7.3 A resistance-drift compensation scheme to reduce MLC PCM raw BER by over 100× for storage-class memory applications. ISSCC 2016: 134-135 - [i3]Sukru Burc Eryilmaz, Emre Neftci, Siddharth Joshi, SangBum Kim, Matthew BrightSky, Hsiang-Lan Lung, Chung Lam, Gert Cauwenberghs, H.-S. Philip Wong:
Training a Probabilistic Graphical Model with Resistive Switching Electronic Synapses. CoRR abs/1609.08686 (2016) - 2014
- [i2]Sukru Burc Eryilmaz, Duygu Kuzum, Rakesh Gnana David Jeyasingh, SangBum Kim, Matthew BrightSky, Chung Lam, H.-S. Philip Wong:
Experimental Demonstration of Array-level Learning with Phase Change Synaptic Devices. CoRR abs/1405.7716 (2014) - [i1]Sukru Burc Eryilmaz, Duygu Kuzum, Rakesh Gnana David Jeyasingh, SangBum Kim, Matthew BrightSky, Chung Lam, H.-S. Philip Wong:
Brain-like associative learning using a nanoscale non-volatile phase change synaptic device array. CoRR abs/1406.4951 (2014) - 2013
- [j1]Gael F. Close, Urs Frey
A 256-Mcell Phase-Change Memory Chip Operating at 2+ Bit/Cell. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(6): 1521-1533 (2013)
Coauthor Index
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