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Eike Linn
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2010 – 2019
- 2018
- [j10]Debjyoti Bhattacharjee
, Anne Siemon, Eike Linn, Stephan Menzel
Kogge-Stone Adder Realization using 1S1R Resistive Switching Crossbar Arrays. ACM J. Emerg. Technol. Comput. Syst. 14(2): 30:1-30:14 (2018) - 2017
- [j9]Erik Cambria
Storages Are Not Forever. Cogn. Comput. 9(5): 646-658 (2017) - [j8]Debjyoti Bhattacharjee
Efficient complementary resistive switch-based crossbar array Booth multiplier. Microelectron. J. 64: 78-85 (2017) - 2016
- [j7]Lutz Nielen
Memristive Sorting Networks Enabled by Electrochemical Metallization Cells. Int. J. Unconv. Comput. 12(4): 303-317 (2016) - [c8]Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Anne Siemon, Eike Linn, Rainer Waser, Anupam Chattopadhyay, Giovanni De Micheli:
The Programmable Logic-in-Memory (PLiM) computer. DATE 2016: 427-432 - [c7]Debjyoti Bhattacharjee
Efficient implementation of multiplexer and priority multiplexer using 1S1R ReRAM crossbar arrays. MWSCAS 2016: 1-4 - 2015
- [j6]Anne Siemon, Stephan Menzel
A Complementary Resistive Switch-Based Crossbar Array Adder. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(1): 64-74 (2015) - [j5]Lutz Nielen
Study of Memristive Associative Capacitive Networks for CAM Applications. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(2): 153-161 (2015) - [j4]Ondrej Such
On Passive Permutation Circuits. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(2): 173-182 (2015) - [c6]Said Hamdioui, Lei Xie, Hoang Anh Du Nguyen, Mottaqiallah Taouil, Koen Bertels, Henk Corporaal, Hailong Jiao, Francky Catthoor, Dirk J. Wouters, Eike Linn, Jan van Lunteren:
Memristor based computation-in-memory architecture for data-intensive applications. DATE 2015: 1718-1725 - [c5]Anne Siemon, Stephan Menzel, Rainer Waser
Controllability of multi-level states in memristive device models using a transistor as current compliance during SET operation. IJCNN 2015: 1-8 - [c4]Anne Siemon, Stephan Menzel, Anupam Chattopadhyay, Rainer Waser
In-memory adder functionality in 1S1R arrays. ISCAS 2015: 1338-1341 - 2014
- [j3]S. Ferch, Eike Linn, Rainer Waser
Simulation and comparison of two sequential logic-in-memory approaches using a dynamic electrochemical metallization cell model. Microelectron. J. 45(11): 1416-1428 (2014) - [j2]Eike Linn, Anne Siemon, Rainer Waser
Applicability of Well-Established Memristive Models for Simulations of Resistive Switching Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(8): 2402-2410 (2014) - [c3]Lutz Nielen
Live demonstration: An associative capacitive network based on nanoscale complementary resistive switches. ISCAS 2014: 439 - [c2]Anne Siemon, Stephan Menzel
Simulation of TaOx-based complementary resistive switches by a physics-based memristive model. ISCAS 2014: 1420-1423 - [c1]Eike Linn:
Memristive nano-crossbar arrays enabling novel computing paradigms. ISCAS 2014: 2596-2599 - [i2]Eike Linn, Anne Siemon, Rainer Waser, Stephan Menzel:
Applicability of Well-Established Memristive Models for Simulations of Resistive Switching Devices. CoRR abs/1403.5801 (2014) - [i1]Anne Siemon, Stephan Menzel, Rainer Waser, Eike Linn:
A Complementary Resistive Switch-based Crossbar Array Adder. CoRR abs/1410.2031 (2014) - 2012
- [b1]Eike Cyrus Linn:
Complementary Resistive Switches. RWTH Aachen University, Verlag Dr. Hut 2012 - 2010
- [j1]Victor V. Zhirnov, Ralph K. Cavin III, Stephan Menzel
Memory Devices: Energy-Space-Time Tradeoffs. Proc. IEEE 98(12): 2185-2200 (2010)
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