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Ying-Jung Chen

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2010 – 2019

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2015
[c4]
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  - conf/vlsi/ChenR15
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Ying-Jung Chen, Shanq-Jang Ruan:
A cluster-based reliability- and thermal-aware 3D floorplanning using redundant STSVs. VLSI-SoC 2015: 349-354
2014
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Tsang-Chi Kan, Ying-Jung Chen, Hung-Ming Hong, Shanq-Jang Ruan:
Rule-Based Redundant Via-Aware Standard Cell Design Considering Multiple Via Configuration. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(2): 597-605 (2014)
2013
[c3]
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  - conf/isqed/HsuRCK13
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Chih-han Hsu, Shanq-Jang Ruan, Ying-Jung Chen, Tsang-Chi Kan:
Reliability consideration with rectangle- and double-signal through silicon vias insertion in 3D thermal-aware floorplanning. ISQED 2013: 316-321
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Tsang-Chi Kan, Hung-Ming Hong, Ying-Jung Chen, Shanq-Jang Ruan:
Configurable redundant via-aware standard cell design considering multi-via mechanism. ISQED 2013: 322-326
2012
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  - conf/cso/ChouSHCCLCCCC12
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Chun-Mei Chou, Chien-Hua Shen, Hsi-Chi Hsiao, Hui-Tzu Chang, Ying-Jung Chen, Wan-Hsuan Lee, Su-Chang Chen, Chin-Pin Chen, Jen-Chia Chang, Shih-Hsien Chuang:
Analysis of students' employability self-efficacy and entrepreneurial career intention: using labor market information as a mediator variable. CSO 2012: 32-35

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