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Manoj Saxena
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- affiliation: University of Delhi, India
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2020 – today
- 2024
- [j13]Chanchal, Mohammad Faisal, Robert Laishram, Sharmila, Sonalee Kapoor, Jaya Lohani
, D. S. Rawal, Manoj Saxena
Ohmic contacts to n-type SiC: Influence of Au and Ta intermediate layers. Microelectron. J. 151: 106361 (2024) - 2023
- [j12]Sonam
Secure digital image watermarking using memristor-based hyperchaotic circuit. Vis. Comput. 39(10): 4459-4485 (2023) - 2022
- [j11]Khushwant Sehra
Interplay Between γ-Ray Irradiation and 3DEG for Dosimeter Applications. IEEE Access 10: 25811-25827 (2022) - [j10]Neha
Investigation of proton irradiated dual field plate AlGaN/GaN HEMTs: TCAD based assessment. Microelectron. J. 122: 105405 (2022) - [c6]Khushwant Sehra
Implications of Field Plate HEMT Towards Power Performance at Microwave X - Band. VDAT 2022: 65-75 - [c5]Chanchal, Ajay Kumar Visvkarma, Hardhyan Sheoran
Investigation of Traps in AlGaN/GaN HEMT Epitaxial Structure Using Conductance Method. VDAT 2022: 76-84 - 2021
- [j9]Khushwant Sehra
Robust and Secure Digital Image Watermarking Technique Using Arnold Transform and Memristive Chaotic Oscillators. IEEE Access 9: 72465-72483 (2021) - [j8]Anupama Anand
A comparative study on the accuracy of small-signal equivalent circuit modeling for large gate periphery GaN HEMT with different source to drain length and gate width. Microelectron. J. 118: 105258 (2021)
2010 – 2019
- 2018
- [c4]Preeti Singh, Vandana Kumari, Manoj Saxena
Threshold Voltage Investigation of Recessed Dual-Gate MISHEMT: Simulation Study. VDAT 2018: 380-393 - 2017
- [c3]Ajay Singh, Rakhi Narang
Analysis of Electrolyte-Insulator-Semiconductor Tunnel Field-Effect Transistor as pH Sensor. VDAT 2017: 249-258 - [c2]Rakhi Narang
Improved Gate Modulation in Tunnel Field Effect Transistors with Non-rectangular Tapered Y-Gate Geometry. VDAT 2017: 463-473 - [c1]Vandana Kumari, Manoj Saxena
Variability Investigation of Double Gate JunctionLess (DG-JL) Transistor for Circuit Design Perspective. VDAT 2017: 496-503 - 2014
- [j7]Rajni Gautam
Temperature dependent subthreshold model of long channel GAA MOSFET including localized charges to study variations in its temperature sensitivity. Microelectron. Reliab. 54(1): 37-43 (2014) - 2013
- [j6]Rakhi Narang
Drain current model for a gate all around (GAA) p-n-p-n tunnel FET. Microelectron. J. 44(6): 479-488 (2013) - [j5]Rajni Gautam
Numerical analysis of localised charges impact on static and dynamic performance of nanoscale cylindrical surrounding gate MOSFET based CMOS inverter. Microelectron. Reliab. 53(2): 236-244 (2013) - 2012
- [j4]Vandana Kumari, Manoj Saxena
Temperature dependent drain current model for Gate Stack Insulated Shallow Extension Silicon On Nothing (ISESON) MOSFET for wide operating temperature range. Microelectron. Reliab. 52(6): 974-983 (2012) - [j3]Rajni Gautam
Effect of localised charges on nanoscale cylindrical surrounding gate MOSFET: Analog performance and linearity analysis. Microelectron. Reliab. 52(6): 989-994 (2012) - [j2]Vandana Kumari, Manoj Saxena
Simulation study of Insulated Shallow Extension Silicon On Nothing (ISESON) MOSFET for high temperature applications. Microelectron. Reliab. 52(8): 1610-1612 (2012) - [j1]Rakhi Narang
Immunity against temperature variability and bias point invariability in double gate tunnel field effect transistor. Microelectron. Reliab. 52(8): 1617-1620 (2012)
Coauthor Index
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