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Ajit Dingankar
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2010 – 2019
- 2015
- [c13]Guantao Liu, Tim Schmidt, Rainer Dömer, Ajit Dingankar, Desmond Kirkpatrick:
Optimizing thread-to-core mapping on manycore platforms with distributed Tag Directories. ASP-DAC 2015: 429-434 - 2010
- [j2]Theocharis Theocharides, Maria K. Michael, Marios M. Polycarpou, Ajit Dingankar:
Hardware-Enabled Dynamic Resource Allocation for Manycore Systems Using Bidding-Based System Feedback. EURASIP J. Embed. Syst. 2010 (2010)
2000 – 2009
- 2009
- [c12]Theocharis Theocharides, Maria K. Michael, Marios M. Polycarpou, Ajit Dingankar:
Towards embedded runtime system level optimization for MPSoCs: on-chip task allocation. ACM Great Lakes Symposium on VLSI 2009: 121-124 - [c11]Sumit Ahuja, Deepak Mathaikutty, Gaurav Singh, Joe Stetzer, Sandeep K. Shukla, Ajit Dingankar:
Power estimation methodology for a high-level synthesis framework. ISQED 2009: 541-546 - 2008
- [j1]Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja:
MMV: A Metamodeling Based Microprocessor Validation Environment. IEEE Trans. Very Large Scale Integr. Syst. 16(4): 339-352 (2008) - [c10]Theocharis Theocharides, Maria K. Michael, Marios M. Polycarpou, Ajit Dingankar:
A Novel System-Level On-Chip Resource Allocation Method for Manycore Architectures. ISVLSI 2008: 99-104 - 2007
- [c9]Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar:
Design fault directed test generation for microprocessor validation. DATE 2007: 761-766 - [c8]Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla:
A Metamodeling based Framework for Architectural Modeling and Simulator Generation. FDL 2007: 210-218 - [c7]Deepak Mathaikutty, Sumit Ahuja, Ajit Dingankar, Sandeep K. Shukla:
Model-driven test generation for system level validation. HLDVT 2007: 83-90 - [c6]Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla, Ajit Dingankar:
Assertion-Based Modal Power Estimation. MTV 2007: 3-7 - [c5]Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja:
Model Based Test Generation for Microprocessor Architecture Validation. VLSI Design 2007: 465-472 - 2006
- [c4]Ajit Dingankar, Deepak Mathaikutty, Sreekumar V. Kodakara, Sandeep K. Shukla, David J. Lilja:
MMV: Metamodeling Based Microprocessor Valiation Environment. HLDVT 2006: 143-148
1990 – 1999
- 1995
- [c3]Ajit Dingankar, Irwin W. Sandberg:
On Error Bounds for Neural Network Approximation. ISCAS 1995: 490-492
1980 – 1989
- 1988
- [c2]R. Larry Dooley, Ajit Dingankar, G. Heimke, E. Berg:
Orthopedic implant design, analysis, and manufacturing system. CBMS 1988: 60-64 - [c1]R. Larry Dooley, G. Heimke, Ajit Dingankar, E. Berg, E. Kimbrough:
Automated Design and Analysis System for Design of Custom Orthopedic Implants. IEA/AIE (Vol. 1) 1988: 405-412
Coauthor Index
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