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I-Jye Lin
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2020 – today
- 2023
- [c6]Kai-Shun Hu, Hao-Yu Chi, I-Jye Lin, Yi-Hsuan Wu, Wei-Hsu Chen, Yi-Ting Hsieh:
Invited Paper: 2023 ICCAD CAD Contest Problem B: 3D Placement with Macros. ICCAD 2023: 1-6 - 2022
- [c5]Kai-Shun Hu, I-Jye Lin, Yu-Hui Huang, Hao-Yu Chi, Yi-Hsuan Wu, Cindy Chin-Fang Shen:
2022 ICCAD CAD Contest Problem B: 3D Placement with D2D Vertical Connections. ICCAD 2022: 94:1-94:5
2010 – 2019
- 2014
- [j2]Yuan-Kai Ho, Hsu-Chieh Lee, Webber Lee, Yao-Wen Chang, Chen-Feng Chang, I-Jye Lin, Chin-Fang Shen:
Obstacle-Avoiding Free-Assignment Routing for Flip-Chip Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(2): 224-236 (2014) - 2012
- [c4]Po-Wei Lee, Hsu-Chieh Lee, Yuan-Kai Ho, Yao-Wen Chang, Chen-Feng Chang, I-Jye Lin, Chin-Fang Shen:
Obstacle-avoiding free-assignment routing for flip-chip designs. DAC 2012: 1088-1093
2000 – 2009
- 2007
- [j1]Jia-Wei Fang, I-Jye Lin, Yao-Wen Chang, Jyh-Herng Wang:
A Network-Flow-Based RDL Routing Algorithmz for Flip-Chip Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(8): 1417-1429 (2007) - [c3]I-Jye Lin, Yao-Wen Chang:
An efficient algorithm for statistical circuit optimization using Lagrangian relaxation. ICCAD 2007: 119-124 - [c2]I-Jye Lin, Tsui-Yee Ling, Yao-Wen Chang:
Statistical circuit optimization considering device andinterconnect process variations. SLIP 2007: 47-54 - 2005
- [c1]Jia-Wei Fang, I-Jye Lin, Ping-Hung Yuh, Yao-Wen Chang, Jyh-Herng Wang:
A routing algorithm for flip-chip design. ICCAD 2005: 753-758
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