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Pascal Sainrat
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2020 – today
- 2023
- [j14]Alban Gruin
, Thomas Carle
MINOTAuR: A Timing Predictable RISC-V Core Featuring Speculative Execution. IEEE Trans. Computers 72(1): 183-195 (2023) - [c36]Alban Gruin
Enabling timing predictability in the presence of store buffers. RTNS 2023: 1-10 - [c35]Alban Gruin
Validation of Processor Timing Models Using Cycle-Accurate Timing Simulators. WCET 2023: 2:1-2:12
2010 – 2019
- 2016
- [j13]Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel G. Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quiñones, Milos Panic
Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore. ACM Trans. Embed. Comput. Syst. 15(3): 53:1-53:27 (2016) - [c34]Quentin Perret, Pascal Maurère, Eric Noulard, Claire Pagetti, Pascal Sainrat, Benoit Triquet:
Temporal Isolation of Hard Real-Time Applications on Many-Core Processors. RTAS 2016: 37-47 - [c33]Quentin Perret, Pascal Maurère, Éric Noulard, Claire Pagetti, Pascal Sainrat, Benoît Triquet:
Mapping hard real-time applications on many-core processors. RTNS 2016: 235-244 - 2014
- [b1]Christine Rochange, Sascha Uhrig, Pascal Sainrat:
Time-Predictable Architectures. FOCUS - Computer Engineering Series, iSTE / Wiley 2014, ISBN 978-1-84821-593-1, pp. I-VIII, 1-180 - [c32]Haluk Ozaktas, Christine Rochange, Pascal Sainrat:
Minimizing the cost of synchronisations in the WCET of real-time parallel programs. SCOPES 2014: 98-107 - 2013
- [c31]Roman Bourgade, Christine Rochange, Pascal Sainrat:
Predictable Two-Level Bus Arbitration for Heterogeneous Task Sets. ARCS 2013: 341-351 - [c30]Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, Jörg Mische, João Fernandes, Pavel G. Zaykov, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Ian Broster, Nick Lay, David George, Eduardo Quiñones
parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability. DSD 2013: 363-370 - [c29]Haluk Ozaktas, Christine Rochange, Pascal Sainrat:
Automatic WCET Analysis of Real-Time Parallel Applications. WCET 2013: 11-20 - [c28]Hugues Cassé, Florian Birée, Pascal Sainrat:
Multi-architecture Value Analysis for Machine Code. WCET 2013: 42-52 - 2012
- [c27]Mike Gerdes, Florian Kluge, Theo Ungerer, Christine Rochange, Pascal Sainrat:
Time analysable synchronisation techniques for parallelised hard real-time applications. DATE 2012: 671-676 - 2011
- [j12]Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer:
RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor. Comput. Syst. Sci. Eng. 26(6) (2011) - [j11]Pascal Sainrat:
Éditorial. Tech. Sci. Informatiques 30(9): 1033-1034 (2011) - [c26]Roman Bourgade, Christine Rochange, Pascal Sainrat:
Predictable bus arbitration schemes for heterogeneous time-critical workloads running on multicore processors. ETFA 2011: 1-4 - 2010
- [j10]Theo Ungerer, Francisco J. Cazorla
Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability. IEEE Micro 30(5): 66-75 (2010) - [j9]Jonathan Barre, Christine Rochange, Pascal Sainrat:
Architecture d'un processeur multiflot orienté temps-réel. Tech. Sci. Informatiques 29(2): 157-178 (2010) - [c25]Hugues Cassé, Pascal Sainrat, Clément Ballabriga, Marianne De Michiel:
Experimentation of WCET computation on both ends of automotive processor range. EDCC-CARS 2010: 67-70 - [c24]Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer:
RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor. ISORC 2010: 193-201 - [c23]Clément Ballabriga, Hugues Cassé, Christine Rochange, Pascal Sainrat:
OTAWA: An Open Toolbox for Adaptive WCET Analysis. SEUS 2010: 35-46 - [c22]Christine Rochange, Armelle Bonenfant, Pascal Sainrat, Mike Gerdes, Julian Wolf, Theo Ungerer, Zlatko Petrov, Frantisek Mikulu:
WCET Analysis of a Parallel 3D Multigrid Solver Executed on the MERASA Multi-Core. WCET 2010: 90-100
2000 – 2009
- 2009
- [j8]Christine Rochange, Pascal Sainrat:
A Context-Parameterized Model for Static Analysis of Execution Times. Trans. High Perform. Embed. Archit. Compil. 2: 222-241 (2009) - 2008
- [c21]Jonathan Barre, Christine Rochange, Pascal Sainrat:
A Predictable Simultaneous Multithreading Scheme for Hard Real-Time. ARCS 2008: 161-172 - [c20]Marianne De Michiel, Armelle Bonenfant, Hugues Cassé, Pascal Sainrat:
Static Loop Bound Analysis of C Programs Based on Flow Analysis and Abstract Interpretation. RTCSA 2008: 161-166 - [c19]Clément Ballabriga, Hugues Cassé, Pascal Sainrat:
An improved approach for set-associative instruction cache partial analysis. SAC 2008: 360-367 - [c18]Jonathan Barre, Christine Rochange, Pascal Sainrat:
An architecture for the simultaneous execution of hard real-time threads. ICSAMOS 2008: 18-24 - [c17]Fadia Nemer, Hugues Cassé, Pascal Sainrat, Jean Paul Bahsoun:
Inter-task WCET computation for a-way instruction caches. SIES 2008: 169-176 - [c16]Niklas Holsti, Jan Gustafsson, Guillem Bernat, Clément Ballabriga, Armelle Bonenfant, Roman Bourgade, Hugues Cassé, Daniel Cordes, Albrecht Kadlec, Raimund Kirner, Jens Knoop, Paul Lokuciejewski, Nicholas Merriam, Marianne De Michiel, Adrian Prantl, Bernhard Rieder, Christine Rochange, Pascal Sainrat, Markus Schordan:
WCET 2008 - Report from the Tool Challenge 2008 -- 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis. WCET 2008 - 2007
- [j7]Koen De Bosschere, Wayne Luk, Xavier Martorell
High-Performance Embedded Architecture and Compilation Roadmap. Trans. High Perform. Embed. Archit. Compil. 1: 5-29 (2007) - [c15]Fadia Nemer, Hugues Cassé, Pascal Sainrat, Ali Awada:
Improving the Worst-Case Execution Time Accuracy by Inter-Task Instruction Cache Analysis. SIES 2007: 25-32 - [e1]Taewhan Kim, Pascal Sainrat, Steven S. Lumetta, Nacho Navarro:
Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007. ACM 2007 [contents] - 2006
- [c14]Jonathan Barre, Cédric Landet, Christine Rochange, Pascal Sainrat:
Modeling Instruction-Level Parallelism for WCET Evaluation. RTCSA 2006: 61-67 - [c13]Djemai Kebbal, Pascal Sainrat:
Combining Symbolic Execution and Path Enumeration in Worst-Case Execution Time Analysis. WCET 2006 - [c12]Fadia Nemer, Hugues Cassé, Pascal Sainrat, Jean Paul Bahsoun, Marianne De Michiel:
PapaBench: a Free Real-Time Benchmark. WCET 2006 - 2005
- [j6]Christine Rochange, Pascal Sainrat:
Régulation du flot d'instructions pour des processeurs orientés temps réel. Tech. Sci. Informatiques 24(8): 963-989 (2005) - [c11]Christine Rochange, Pascal Sainrat:
A time-predictable execution mode for superscalar pipelines with instruction prescheduling. Conf. Computing Frontiers 2005: 307-314 - [c10]Claire Burguière, Christine Rochange, Pascal Sainrat:
A Case for Static Branch Prediction in Real-Time Systems. RTCSA 2005: 33-38 - 2003
- [j5]Antoine Colin, Isabelle Puaut, Christine Rochange, Pascal Sainrat:
Calcul de majorants de pire temps d'exécution : état de l'art. Tech. Sci. Informatiques 22(5): 651-677 (2003) - [j4]Thierry Haquin, Philippe Reynes, Christine Rochange, Pascal Sainrat:
Optimisations du chargement des instructions. Tech. Sci. Informatiques 22(6): 689-711 (2003) - [c9]Christine Rochange, Pascal Sainrat:
Towards Designing WCET-Predictable Processors. WCET 2003: 87-90 - 2002
- [j3]Hugues Cassé, Louis Féraud, Christine Rochange, Pascal Sainrat:
Une approche pour réduire la complexité du flot de contrôle dans les programmes C. Tech. Sci. Informatiques 21(7): 1009-1032 (2002) - 2000
- [p1]Daniel Litaize, Abdelaziz Mzoughi, Christine Rochange, Pascal Sainrat:
Architecture of Parallel and Distributed Systems. Handbook on Parallel and Distributed Processing 2000: 166-227
1990 – 1999
- 1999
- [j2]Hugues Cassé, Louis Féraud, Christine Rochange, Pascal Sainrat:
Using the abstract interpretation technique for static pointer analysis. SIGARCH Comput. Archit. News 27(1): 47-50 (1999) - [c8]Pascal Sainrat, Mateo Valero:
Instruction-Level Parallelism and Uniprocessor Architecture - Introduction. Euro-Par 1999: 1241-1242 - 1996
- [c7]André Seznec, Stéphan Jourdan, Pascal Sainrat, Pierre Michaud
Multiple-Block Ahead Branch Predictors. ASPLOS 1996: 116-127 - 1995
- [c6]Stéphan Jourdan, Pascal Sainrat, Daniel Litaize:
Exploring Configurations of Functional Units in an Out-of-Order Superscalar Processor. ISCA 1995: 117-125 - [c5]Stéphan Jourdan, Pascal Sainrat, Daniel Litaize:
An investigation of the performance of various instruction-issue buffer topologies. MICRO 1995: 279-284 - 1993
- [c4]Christine Rochange, Pascal Sainrat, Daniel Litaize:
Performance of M3S for the SOR algorithm. PARLE 1993: 676-679 - 1992
- [c3]Daniel Litaize, Abdelaziz Mzoughi, Christine Rochange, Pascal Sainrat:
Towards a Shared-Memory Massively Parallel Multiprocessor. ISCA 1992: 70-79 - [c2]Pascal Sainrat, Abdelaziz Mzoughi, Christine Rochange, Daniel Litaize:
The Design of the M3S: A Multiported Shared-Memory Multiprocessor. SC 1992: 326-335
1980 – 1989
- 1989
- [j1]Daniel Litaize, Omar Hammami, Mustapha Lalam, Abdelaziz Mzoughi, Pascal Sainrat:
Multiprocessors with a serial multiport memory and a pseudo crossbar of serial links used s a processor-memeory switch. SIGARCH Comput. Archit. News 17(6): 8-21 (1989) - [c1]Daniel Litaize, Fatimazhra Elkhlifi, Omar Hammami, Mustapha Lalam, Abdelaziz Mzoughi, Pascal Sainrat, Jean-Claude Salinier:
Serial Multiport Memory Multiprocessors. PARLE (1) 1989: 34-51
Coauthor Index
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