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Bernd Koenemann
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2000 – 2009
- 2006
- [c9]David Abercrombie, Bernd Koenemann, Nagesh Tamarapalli, Srikanth Venkataraman:
DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield. VLSI Design 2006: 14 - 2004
- [c8]Bernd Koenemann:
Design/process learning from electrical test. ICCAD 2004: 733-738 - [c7]Bernd Koenemann:
Test In the Era of "What You see Is NOT What You Get". ITC 2004: 12 - 2003
- [c6]Bernd Koenemann:
STAGE: A Decoding Engine Suitable for Multi-Compressed Test Data. Asian Test Symposium 2003: 142-147 - 2002
- [c5]Fidel Muradali, Mike Ricchetti, Bart Vermeulen, Bulent I. Dervisoglu, Bob Gottlieb, Bernd Koenemann, C. J. Clark:
Reducing Time to Volume and Time to Market: Is Silicon Debug and Diagnosis the Answer? VTS 2002: 445-446 - 2001
- [c4]Bill Bottoms, Jim Chung, Bernd Koenemann, Glenn Shirley, Lisa Spainhower:
Guaranteeing Quality throughout the Product Life Cycle: On-Line Test and Repair to the Rescue. VTS 2001: 153-154 - 2000
- [j1]John A. Darringer, Evan E. Davidson, David J. Hathaway, Bernd Koenemann, Mark A. Lavin, Joseph K. Morrell, Khalid Rahmat, Wolfgang Roesner, Erich C. Schanzenbach, Gustavo E. Téllez, Louise Trevillyan:
EDA in IBM: past, present, and future. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(12): 1476-1497 (2000)
1990 – 1999
- 1997
- [c3]D. Cheung, Bernd Koenemann, S. Nishtala, B. West, D. Wu:
ATE for VLSI: What Challenges Lie Ahead? VTS 1997: 318-319 - 1996
- [c2]Bernd Koenemann, J. Monzel, T. Powell, N. Saxena, K. Wagner:
Design Validation: Formal Verification vs. Simulation vs. Functional Testing. VTS 1996: 364-365 - [c1]Bernd Koenemann, J. Monzel, T. Powell, N. Saxena, K. Wagner:
BIST: Advantages or Limitations? VTS 1996: 366-367
Coauthor Index
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