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IEEE Transactions on Electronic Computers, Volume 13
Volume 13, Number 1, February 1964
- Bernard Elspas, Robert A. Short:
A Bound on the Run Measure of Switching Functions. 1-4 - Saul Amarel, G. Cooke, Robert O. Winder:
Majority Gate Networks. 4-13 - Christopher S. Wallace:
A Suggestion for a Fast Multiplier. 14-17 - Michael Cooperman:
300-Mc Tunnel-Diode Logic Circuits. 18-26 - George G. Pick, S. B. Gray, Donald B. Brick:
The Solenoid Array-A New Computer Element. 27-35 - Richard F. M. Thornley, A. V. Brown, A. J. Speth:
Electron Beam Recording of Digital Information. 36-40 - Christopher J. Sheehan:
An Analog Computer Simulation of the Restricted Three-Body Problem by Automatic Scale-Changing Techniques. 41-50 - Keith W. Henderson:
Some Notes on the Walsh Functions. 50-52 - Martin Cohn:
A Theorem on Linear Automata. 52-53 - Daniel C. Fielder:
On Shannon's Almost Uniform Distribution. 53-54 - Roger C. Lamson:
A Division Algorithm for a Digital Differential Analyzer. 54-55 - E. V. Krishnamurthy:
A Simple Algorithm for Evaluating Positive Values of the Function xy. 55 - Amos Nathan:
Comments on "A Method of Generating Functions of Several Variables. 55-56 - Sigmund N. Porter:
A New Configuration for Faster Cryotron Circuits. 56-57 - Donald B. Brick, George G. Pick:
Microsecond Word-Recognition System. 57-59
Volume 13, Number 2, April 1964
- William M. Waite
:
The Production of Completion Signals by Asynchronous, Iterative Networks. 83-86 - Franco Mileto, Gianfranco R. Putzolu:
Average Values of Quantities Appearing in Boolean Function Minimization. 87-92 - Roy D. Merrill:
Improving Digital Computer Performance Using Residue Number Theory. 93-101 - Theodore R. Bashkow:
A Sequential Circuit for Algebraic Statement Translation. 102-105 - I. R. Butcher:
A Prewired Storage Unit. 106-111 - John E. Gillis:
A Technique for Achieving High Bit Packing Density on Magnetic Tape. 112-117 - Herbert Freeman, L. Garder:
Apictorial Jigsaw Puzzles: The Computer Solution of a Problem in Pattern Recognition. 118-127 - L. K. Wadhwa:
Simulation of Third Order Systems by a Single Operational Amplifier. 128-147 - Fusachika Miyata:
Comment on "Realization of Arbitrary Logical Functions Using Majority Elements. 148 - S. Y. Levy, Robert O. Winder, Thomas H. Mott Jr.:
A Note on Tributary Switching Networks. 148-151 - Paul E. Wood:
Hazards in Pulse Sequential Circuits. 151-153 - William A. Beyer:
Uniqueness of Weighted Code Representations, III. 153-154 - Janusz A. Brzozowski, Edward J. McCluskey:
About Signal Flow Graph Techniques for Sequential Circuits. 154 - Orville Goering:
Radix Conversion in a Hexadecimal Machine. 154-155 - Forrest Salter:
A Ternary Memory Element Using a Tunnel Diode. 155-156 - Harry J. Gray, Henry Ruston:
On Techniques for Coping with the Information Explosion. 156 - D. Cowgill:
Logic Equations for a Built-In Square Root Method. 156-157 - Joseph Otterman:
Comment on "A Fundamental Error Theory for Analog Computers. 157
Volume 13, Number 3, June 1964
- Zvi Kohavi:
Secondary State Assignment for Sequential Machines. 193-203 - Rocco H. Urbano:
On the Convergence and Ultimate Reliability of Iterated Neural Nets. 204-225 - Arthur Gill:
Analysis of Linear Sequential Circuits by Confluence Sets. 226-231 - Ching-Lai Sheng:
A Method for Testing and Realization of Threshold Functions. 232-239 - Clarence L. Coates, Philip M. Lewis II:
DONUT: A Threshold Gate Computer. 240-247 - R. M. Brown, Richard D. Jenks, J. E. Stifle, R. L. Trogdon:
The CSX-l Computer. 247-250 - J. R. Cox Jr., D. H. Glaeser:
A Quantising Encoder. 250-254 - Emil Hopner:
High-Density Binary Recording Using Nonsaturation Techniques. 255-261 - C. J. Townsend, P. E. Fox:
Cylindrical Film Memory Device Characteristics. 261-268 - H. H. Harris Jr., W. David Pricer:
Tunnel Diode Delay-Line Memory. 269-272 - David Nitzan:
Flux Divison in a Saturable Multipath Core. 272-277 - Edmund E. Newhall, J. R. Perucca:
Exploitation of Initial Conditions to Achieve Flux Gain and Nondestructive Readout in Balanced Magnetic Circuits. 278-284 - Paul E. Harris, B. E. Simmons:
DC Accuracy in a Fast Boxcar Circuit Via a Comparator. 285-288 - Panchanan Kundu, Satyabrata Banerji:
Transistorized Multiplier and Divider and Its Applications. 288-295 - Alan E. Negrin:
Synthesis of Practical Three-Input Majority Logic Networks. 296-299 - Scott H. Cameron:
The Generation of Minimal Threshold Nets by an Integer Program. 299-302 - David H. Jacobsohn:
A Self-Organizing Drum. 302 - Giorgio Coraluppi:
On Signal Deterioration in Digital Computers. 303 - Herbert D. Goldman:
Protecting Core Memory Circuits with Error Correcting Cyclic Codes. 303-304 - Bernard Lippel:
Negative-Bit-Weight Codes and Excess Codes. 304-306 - David B. Cooper:
Adaptive Pattern Recognition and Signal Detection Using Stochastic Approximation. 306-307 - E. G. Homer, W. Palmer:
Comparison of Computational Speeds of Digital Differential Analyzers and General Purpose Computers. 307-308 - Michael P. Beddoes, C. André T. Salama:
Series Connected Tunnel-Diode Multilevel Register. 308-309 - L. P. Goodstein:
Tunnel-Diode Amplitude Comparator. 309-310 - Keinosuke Fukunaga:
A Theory of Nonlinear Autonomous Sequential Nets Using z Transforms. 310-312 - J. V. Gaudiosi:
Proposed Magnetic Variation Analog Computer for Use in Flight Simulators. 312
Volume 13, Number 4, August 1964
- Robert W. Floyd:
The Syntax of Programming Languages-A Survey. 346-353 - Peter S. Landweber:
Decision Problems of Phrase-Structure Grammars. 354-362 - Russell A. Kirsch:
Computer Interpretation of English Text and Picture Patterns. 363-376 - Michael Woodger:
Algol. 377-381 - John Warner Backus, William P. Heising:
Fortran. 382-385 - Jean E. Sammet, E. R. Bond:
Introduction to FORMAC. 386-394 - Daniel G. Bobrow, Joseph Weizenbaum:
List Processing and Extension of Language Facility by Embedding. 395-400 - Donald E. Knuth, J. L. McNeley:
SOLߞA Symbolic Language for General-Purpose Systems Simulation. 401-408 - Donald E. Knuth, J. L. McNeley:
A Formal Definition of SOL. 409-414 - Roger A. Gaskill:
A Versatile Problem-Oriented Language for Engineers. 415-421 - Roy M. Proctor:
A Logic Design Translator Experiment Demonstrating Relationships of Language to Systems and Logic Design. 422-430 - Mark B. Wells:
Aspects of Language Design for Combinatorial Computing. 431-438 - Hans P. Schlaeppi:
A Formal Language for Describing Machine Logic, Timing, and Sequencing (LOTIS). 439-448 - Alvin P. Mullery:
A Procedure-Oriented Machine Language. 449-455 - J. T. Carleton, P. E. Lego, R. M. Suarez:
A FORTRAN Extension to Facilitate Proposal Preparation. 456-462 - Raymond E. Miller, Shmuel Winograd:
On the Number of Transitions Entering the States of a Finite Automaton. 463-464 - C. Hugh Mays:
Effects of Adaptation Parameters on Convergence Time and Tolerance for Adaptive Threshold Elements. 465-468 - Barrett Hazeltine:
Construction of Irredundant Multilevel Switching Functions. 468-470 - H. Mott Sr., C. C. Carroll:
Numerical Procedures for Boolean Function Minimization. 470 - T. C. Verster:
A Method to Increase the Accuracy of Fast-Serial-Parallel Analog-to-Digital Converters. 471-473 - Wendell B. Sander:
"Ratchet" Circuits for Electronic Analog Storage. 474-475 - Granino A. Korn:
Enforcing Pontryagin's Maximum Principle by Continuous Steepest Descent. 475-476
Volume 13, Number 5, October 1964
- Richard M. Karp:
Some Techniques of State Assignment for Synchronous Sequential Machines. 507-518 - Michael L. Dertouzos:
An Approach to Single-Threshold-Element Synthesis. 519-528 - C. S. Lorens:
Invertible Boolean Functions. 529-541 - Franco P. Preparata:
State-Logic Relations for Autonomous Sequential Networks. 542-548 - Ted A. Dolotta, Edward J. McCluskey:
The Coding of Internal States of Sequential Circuits. 549-562 - J. J. Amodei:
High-Speed Adders and Comparators Using Transistors and Tunnel Dioes. 563-575 - Harry J. Gray:
Fields in Strip-Lines for Film Memory Application. 576-580 - O. Landsverk:
A Fast Coincident Current Magnetic Core Memory. 580-585 - C. N. Liu:
A Programmed Algorithm for Designing Multifont Character Recognition Logics. 586-593 - Albert I. Talkin:
A Systematic Approach to Programming an Analog Computer to Generate a Large Class of Trajectories. 594-597 - Walter J. Karplus:
A Hybrid Computer Technique for Treating Nonlinear Partial Differential Equations. 597-605 - Eiichi Goto:
A Note on Logical Gain. 606-608 - Jorge Santos, Héctor Arango:
Base 3 vs Base 2 Synchronous Arithmetic Units. 608-609 - P. W. Woo:
A Proposal for Input of Hand-Drawn Information to a Digital System. 609-611 - Jack I. Raffel, Thomas S. Crowther:
A Proposal for an Associative Memory Using Magnetic Films. 611 - Vijay K. Randery:
Study of a Parametron on an Analog Computer. 612-614 - H. S. Miller:
Resolving Multiple Responses in an Associative Memory. 614-616 - A. Thiney:
Rise and Fall Times of Transistors in Switching Operation Regardless of the Driving Source Impedance. 616-620 - M. Morris Mano:
Multilevel Diode Logic Circuits. 620-623 - J. Chernak, C. F. Simone:
Simple Equivalent Circuits for a Step Recovery Diode and a Switching Transistor. 623-625 - Fusachika Miyata:
An Extension of the Method of Cohn and Lindaman. 625-629 - David Mandelbaum:
A Measure of Efficiency of Diagnostic Tests Upon Sequential Logic. 630 - Michael A. Harrison:
A Remark on Uniform Distribution. 630-631 - Hikosaburo Ataka:
A Basic Theorem on Threshold Devices. 631 - K. Kannan Nambiar:
A Note on the Walsh Functions. 631-632 - Roy D. Merrill Jr.:
Some Properties of Ternary Threshold Logic. 632-635 - Yates A. Keir:
Algebraic Properties of 3-Valued Compositions. 635-639 - John E. Frank:
The Role of Operational Simulation to Communications System Design. 640 - Sergio Telles Ribeiro:
Comments on Pulsed-Data Hybrid Computers. 640-642 - C. L. Liu:
kth-Order Finite Automaton. 642
Volume 13, Number 6, December 1964
- Janusz A. Brzozowski, Wayne A. Davis:
On the Linearity of Autonomous Sequential Machines. 673-679 - Irving J. Gabelman:
Properties and Transformations of Single Threshold Element Functions. 680-684 - Robert C. Minnick:
Cutpoint Cellular Logic. 685-698 - Yoshihiro Tohma:
Decompositions of Logical Functions Using Majority Decision Elements. 698-705 - J. B. Tommerdahl, A. C. Nelson, Kay K. Mazuy:
Mathematical Models for Predicting Pulse Characteristics in Digital Logic Systems. 705-710 - J. B. Earnshaw:
Design for a Tunnel Diode-Transistor Store with Nondestructive Read-Out of Information. 710-722 - Dieter Seitzer:
Amplifier and Driver Circuits for Thin Film Memories with 15 Nanoseconds Read Cycle Time. 722-729 - Herbert Schorr:
Computer-Aided Digital System Design and Analysis Using a Register Transfer Language. 730-737 - Mu Yue Hsiao, K. Y. Sih:
Serial-to-Parallel Transformation of Linear-Feedback Shift-Register Circuits. 738-740 - Shimon Even:
Rational Numbers and Regular Events. 740-741 - Janusz A. Brzozowski:
Regular Expressions from Sequential Circuits. 741-744 - E. E. Nelson, H. F. Wolf:
A Sampled-Data Analog of Neuron Properties. 744-745 - R. Y. Chao:
A Digital Decoding Technique. 745-746 - B. Wald, F. A. Polkinghorn Jr.:
Simple Instructions Which Enhance the Error Control Capabilities of a Programmed Communications Processor. 747-748 - R. Narasimhan, J. P. Fornango:
Some Further Experiments in the Parallel Processing of Pictures. 748-750 - Richard M. Brown:
On-Line Computer Recognition of Handprinted Characters. 750-752 - G. K. Aggarwal:
Simulation of Third-Order Systems by a Single Operational Amplifier. 752 - Nicholas B. Kurek:
Transistor Equivalent Circuit in Operational Amplifier Configuration. 752-753 - D. Loev:
"Uniform-access" time - a needed concept. 753 - Robert H. Wilkinson:
On the number of regions in input domain of a free distributive lattice. 753-754 - David H. Jacobsohn:
A Suggestion for a Fast Multiplier. 754
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