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ISLPED 2017: Taipei, Taiwan
- 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017, Taipei, Taiwan, July 24-26, 2017. IEEE 2017, ISBN 978-1-5090-6023-8
- David Garrett, Chia-Lin Yang:
Message from the general co-chairs. 1 - Jaydeep Kulkarni, Thomas F. Wenisch:
Message from the program co-chairs. 1
Keynotes
- Nicky Liu:
Keynote: A new Silicon Age 4.0: Generating semiconductor-intelligence paradigm with a Virtual Moore's Law Economics and Heterogeneous technologies. 1 - Todd M. Austin:
Keynote: Peering into the post Moore's Law world. 1 - Wen-Mei W. Hwu:
Keynote: Architecture and software for emerging low-power systems. 1 - Gabriel A. Rincón-Mora:
Tutorial: Tiny light-harvesting photovoltaic charger-supplies. 1
Session 1A: Memories & their Applications
- Tsai-Kan Chien, Lih-Yih Chiou, Yi-Sung Tsou, Shyh-Shyuan Sheu, Pei-Hua Wang, Ming-Jinn Tsai, Chih-I Wu:
Write-energy-saving ReRAM-based nonvolatile SRAM with redundant bit-write-aware controller for last-level caches. 1-6 - Vivek Nautiyal, Gaurav Singla, Satinderjit Singh, Fakhruddin Ali Bohra, Jitendra Dasani, Lalit Gupta, Sagar Dwivedi:
Charge recycled low power SRAM with integrated write and read assist, for wearable electronics, designed in 7nm FinFET. 1-6 - Zubair Azim, Kaushik Roy:
Spin-torque sensors with differential signaling for fast and energy efficient global interconnects. 1-6
Session 1B: Design Implications of Novel Interconnects & Technologies
- Aporva Amarnath, Siying Feng
, Subhankar Pal
A carbon nanotube transistor based RISC-V processor using pass transistor logic. 1-6 - Joonho Kong, Young-Ho Gong, Sung Woo Chung:
Architecting large-scale SRAM arrays with monolithic 3D integration. 1-6 - Michael Mishkin, Nam Sung Kim, Mikko H. Lipasti:
Temporal codes in on-chip interconnects. 1-6
Session 2A: Analog Circuit Design
- Jihwan Park, Gi-Moon Hong, Mino Kim, Joo-Hyung Chae
A 0.13pJ/bit, referenceless transceiver with clock edge modulation for a wired intra-BAN communication. 1-6 - William Y. Li, Hyung Seok Kim, Kailash Chandrashekar, Khoa Minh Nguyen, Ashoke Ravi:
A 32nm, 0.65-10GHz, 0.9/0.3 ps/σ TX/RX jitter single inductor digital fractional-n clock generator for reconfigurable serial I/O. 1-6 - Jennifer Zaini, Frédéric Hameau, Thierry Taris, Dominique Morche, Patrick Audebert, Eric Mercier:
A tunable Ultra Low Power inductorless Low Noise Amplifier exploiting body biasing of 28 nm FDSOI technology. 1-6
Session 2B: HW Support for CNNs
- Zhe Yuan, Yongpan Liu, Jinshan Yue, Jinyang Li, Huazhong Yang:
CORAL: Coarse-grained reconfigurable architecture for Convolutional Neural Networks. 1-6 - Lei Jiang, Minje Kim, Wujie Wen, Danghui Wang:
XNOR-POP: A processing-in-memory architecture for binary Convolutional Neural Networks in Wide-IO2 DRAMs. 1-6 - Kyungrak Choi, Woong Choi, Kyungho Shin, Jongsun Park
Bit-width reduction and customized register for low cost convolutional neural network accelerator. 1-6
Session 3A: Energy Storage & Cyber-Physical Systems
- Sangyoung Park
Battery assignment and scheduling for drone delivery businesses. 1-6 - Donkyu Baek, Caiwen Ding
Reconfigurable thermoelectric generators for vehicle radiators energy harvesting. 1-6
Session 3B: Design Methodologies for Machine Learning
- Ankit Mondal, Ankur Srivastava
Power optimizations in MTJ-based Neural Networks through Stochastic Computing. 1-6 - Subhendu Roy, Yuzhe Ma, Jin Miao, Bei Yu:
A learning bridge from architectural synthesis to physical design for exploring power efficient high-performance adders. 1-6
Session 4A: Low-Voltage & Energy-Efficient Design
- Sung Justin Kim, Doyun Kim, Mingoo Seok:
Comparative study and optimization of synchronous and asynchronous comparators at near-threshold voltages. 1-6 - Sandeep Kumar Samal, Sourabh Khandelwal
Full chip power benefits with negative capacitance FETs. 1-6 - Yong Wang
Design high bandwidth-density, low latency and energy efficient on-chip interconnect. 1-6
Session 4B: Approximate & Learn!
- Younghyun Kim
AXSERBUS: A quality-configurable approximate serial bus for energy-efficient sensing. 1-6 - Ashish Ranjan
Approximate memory compression for energy-efficiency. 1-6 - Myung-Hoon Choi, Seungkyu Choi
SENIN: An energy-efficient sparse neuromorphic system with on-chip learning. 1-6
Session 5A: Architecture & Technology Support for Neural Networks
- Kyungwook Chang, Deepak Kadetotad, Yu Cao
Monolithic 3D IC designs for low-power deep neural networks targeting speech recognition. 1-6 - Arnab Roy, Swagath Venkataramani, Neel Gala, Sanchari Sen, Kamakoti Veezhinathan, Anand Raghunathan
A Programmable Event-driven Architecture for Evaluating Spiking Neural Networks. 1-6 - Leibin Ni, Zichuan Liu, Wenhao Song, J. Joshua Yang
An energy-efficient and high-throughput bitwise CNN on sneak-path-free digital ReRAM crossbar. 1-6
Session 5B: Power Delivery
- Wei Ye, Yibo Lin
Placement mitigation techniques for power grid electromigration. 1-6 - Bhoopal Gunna, Lakshmi Bhamidipati, Houman Homayoun, Avesta Sasan:
Spatial and temporal scheduling of clock arrival times for IR hot-spot mitigation, reformulation of peak current reduction. 1-6 - Kyungwook Chang, Shidhartha Das, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim
Frequency and time domain analysis of power delivery network for monolithic 3D ICs. 1-6
Session 6A: Multi-Scale Energy-Efficient Designs
- Han-Yi Lin, Pi-Cheng Hsiu
ShiftMask: Dynamic OLED power shifting based on visual acuity for interactive mobile applications. 1-6 - Young Geun Kim, Sung Woo Chung:
Signal strength-aware adaptive offloading for energy efficient mobile devices. 1-6 - Rathijit Sen, Alan Halverson:
Frequency governors for cloud database OLTP workloads. 1-6 - Minghua Shen, Guojie Luo:
Tiguan: Energy-aware collision-free control for large-scale connected vehicles. 1-6
Session 6B (Special Session): Interaction of Power Management & Security
- Sanu Mathew, Sudhir Satpathy, Vikram B. Suresh, Ram Krishnamurthy:
Invited paper: Ultra-low energy security circuit primitives for IoT platforms. 1-4 - Monodeep Kar, Arvind Singh, Sanu Mathew, Anand Rajan, Vivek De, Saibal Mukhopadhyay:
Invited paper: Low power requirements and side-channel protection of encryption engines: Challenges and opportunities. 1-2 - Pradip Bose, Alper Buyuktosunoglu:
Invited paper: Resilient and energy-secure power management. 1-4 - Augusto Vega, Alper Buyuktosunoglu, Pradip Bose:
Invited paper: Secure swarm intelligence: A new approach to many-core power management. 1-6
Session 7A: Emerging Technologies
- Bon Woong Ku, Taigon Song, Arthur Nieuwoudt, Sung Kyu Lim
Transistor-level monolithic 3D standard cell layout optimization for full-chip static power integrity. 1-6 - Shovan Maity, Debayan Das
Secure Human-Internet using dynamic Human Body Communication. 1-6 - Pavan Kumar Chundi, Yini Zhou, Martha A. Kim, Eren Kursun, Mingoo Seok:
Hotspot monitoring and Temperature Estimation with miniature on-chip temperature sensors. 1-6
Session 7B: Low-Power HW Security
- Muqing Liu, Chen Zhou, Qianying Tang, Keshab K. Parhi
A data remanence based approach to generate 100% stable keys from an SRAM physical unclonable function. 1-6 - Siva Nishok Dhanuskodi, Daniel E. Holcomb:
An improved clocking methodology for energy efficient low area AES architectures using register renaming. 1-6 - Hongxiang Gu, Teng Xu, Miodrag Potkonjak:
A low-power APUF-based environmental abnormality detection framework. 1-6
Poster Session
- James R. B. Bantock
Online tuning of Dynamic Power Management for efficient execution of interactive workloads. 1-6 - Yukai Chen
Workload-driven frequency-aware battery sizing. 1-6 - Yu Liu, Yingyezhe Jin, Peng Li:
Exploring sparsity of firing activities and clock gating for energy-efficient recurrent spiking neural processors. 1-6 - Amir Mahdi Hosseini Monazzah
QuARK: Quality-configurable approximate STT-MRAM cache by fine-grained tuning of reliability-energy knobs. 1-6 - Youngmoon Lee, Eugene Kim, Kang G. Shin:
Efficient thermoelectric cooling for mobile devices. 1-6 - Farhana Parveen
Low power in-memory computing based on dual-mode SOT-MRAM. 1-6 - Chao Zhang, Xiaochen Guo:
Enabling efficient fine-grained DRAM activations with interleaved I/O. 1-6 - Syed Shakib Sarwar, Priyadarshini Panda, Kaushik Roy:
Gabor filter assisted energy efficient fast learning Convolutional Neural Networks. 1-6 - Sungju Ryu, Jongeun Koo, Jae-Joon Kim:
Low design overhead timing error correction scheme for elastic clock methodology. 1-6 - Mohsen Imani, Saransh Gupta
Efficient query processing in crossbar memory. 1-6 - Ming-Hung Chien, Yen-Long Lee, Jih Ren Goh, Soon-Jyh Chang:
A low power duobinary voltage mode transmitter. 1-6 - Wenbin Xu, Sachin S. Sapatnekar
A simple yet efficient accuracy configurable adder design. 1-6 - Chengke Wang, Yao Guo
E-Spector: Online energy inspection for Android applications. 1-6 - Brandon Reagen, José Miguel Hernández-Lobato, Robert Adolf, Michael A. Gelbart, Paul N. Whatmough, Gu-Yeon Wei, David M. Brooks:
A case for efficient accelerator design space exploration via Bayesian optimization. 1-6 - Li Li, Jun Wang, Xiaorui Wang, Handong Ye, Ziang Hu:
SceneMan: Bridging mobile apps with system energy manager via scenario notification. 1-6
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