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24th ICECS 2017: Batumi, Georgia
- 24th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2017, Batumi, Georgia, December 5-8, 2017. IEEE 2017, ISBN 978-1-5386-1911-7
AMM-1 Analog Digital Converters
- Takaaki Ito, Tetsuya Iizuka, Toru Nakura, Kunihiro Asada:
A 40-kS/s 16-bit non-binary SAR ADC in 0.18 CMOS with noise-tunable comparator. 1-4 - Hasan Molaei, Khosrow Hajsadeghi:
A low-power comparator-reduced flash ADC using dynamic comparators. 5-8 - Tomoya Takahashi, Takao Kihara, Tsutomu Yoshimura:
Digital correction of mismatches in time-interleaved ADCs for digital-RF receivers. 9-12 - Gabriel Puech:
An 8 bits 2GS/s ADC in 180 nm CMOS process for healthcare multichannel instruments. 13-16 - Robert Loehr, Leon Bender, Juergen Roeber, Frank Ohnhaeuser, Robert Weigel:
Analysis of the settling behavior of an external reference voltage source for a 16 bit and 200MS/s pipeline analog-to-digital converter. 17-20
COM-1 Amplifiers in Communications
- Temitope Odedeyi
, Izzat Darwazeh:
Matrix single stage distributed amplifier design for ultra wideband application. 21-25 - Ademola Mustapha
A 60-90GHz stagger-tuned low-noise amplifier with 1.2dBm OP1dB in 65nm CMOS. 26-29 - Sedat Kilinc, B. Siddik Yarman
A novel method to design broadband flat gain and sufficiently efficient power amplifiers using real frequency technique. 30-33 - Nourhan Elsayed, Hani H. Saleh
Doherty CMOS power amplifiers for 5G technology. 34-37 - Julia Casarin Puget, Andre Saldanha Oliveira, Jorge Seelen, Ricardo Reis
UFRGSPlace: Routability driven FPGA placement algorithm for heterogeneous FPGAs. 38-41 - Gustavo H. Smaniotto, Regis Zanandrea, Maicon Schneider Cardoso, Renato Souza de Souza, Matheus T. Moreira, Felipe S. Marques, Leomar S. da Rosa Jr.:
A post-processing methodology to improve the automatic design of CMOS gates at layout-level. 42-45 - Eman El Mandouh, A. Gamal, A. Khaled, T. Ibrahim, Amr G. Wassal, Elsayed Hemayed:
Construction of coverage data for post-silicon validation using big data techniques. 46-49 - Khaled Salah, Mohamed Abdelsalam:
Smart auto-correction methodology using assertions and dynamic partial reconfiguration. 50-53
LNL-1 Memristive Systems
- Fakhreddine Zayer
TiO2 memristor model-based chaotic oscillator. 54-57 - Heba Abunahla, Dina Shehada
A novel secure conference communication in IoT devices based on memristors. 58-61 - Abubaker Sasi, Amirali Amirsoleimani, Arash Ahmadi, Majid Ahmadi:
Hybrid memristor-CMOS based linear feedback shift register design. 62-65 - Zbigniew Galias
Coexistence of attractors in the parallel inductor-capacitor-memristor circuit. 66-69 - Bangalore Ramesh Akshay Agashe, Elmar Herzer, Johann Hauer:
A case study on dynamic control of complex operational amplifier performance using back gate biasing. 70-73
AMM-2 OpAmp
- Timo Mai, Konstantin Schmid, Jürgen Röber, Amelie Hagelauer
A fully-differential operational amplifier using a new chopping technique and low-voltage input devices. 74-77 - N. N. Prokopenk, Nikolay V. Butyrlagin
Method for speeding the micropower CMOS operational amplifiers with dual-input-stages. 78-81 - Bangalore Ramesh Akshay Agashe, Elmar Herzer
A case study on dynamic control of complex operational amplifier performance using back gate biasing. 82-85
COM-2 Communication Circuits
- Pragoti Pran Bora, David Borggreve
Low-voltage low-distortion sampling switch design in 22 nm FD-SOI CMOS technology. 86-89 - Serkan Yildiz, Ahmet Aksen, B. Siddik Yarman
Multiband and concurrent matching network design via brune sections. 90-93 - D. Yu. Denisenko
The ARC-HPF with independent trimming of the main characteristics. 94-97 - Hakan Çetinkaya, Tufan Coskun Karalar
A concurrent multiband fully differential CMOS LNA with a local active feedback for cellular applications 3G-4G. 98-102 - Celal Avci, Ece Olcay Günes
Design of 0-15GHz band 180 degree digital phase shifting cell topology. 103-106
EDA-2 Electronic Design
- Shmuel Ben-Yaakov
SPICE simulation of ferrite core losses and hot spot temperature estimation. 107-110 - Ahood Al Jneibi, Menatalla Abououf
Application specific design for digital beam-former (DBF). 111-115 - Emil Lazarescu, Florin Alexa, Doru Vatau, Flaviu-Mihai Frigura-Iliasa:
The assessment of the antenna circuit of a RF wheel unit. 116-119 - Vadi Su Yilmaz, Gulsima Bilgin, Elif Aydin, Ali Kara:
Design considerations for near to the ground communication system and associated Sub-GHz low profile antenna. 120-123 - Amin Sallem, Pedro Pereira
Automatic sensitivity analysis tool for analog active filter. 124-127
LNL-2 Neural Networks
- Shruti R. Kulkarni, John M. Alexiades, Bipin Rajendran:
Learning and real-time classification of hand-written digits with spiking neural networks. 128-131 - Shridu Verma, Narayani Bhatia
Low power neuromorphic hardware based multi-modal authentication system. 132-135 - Omar Eldash, Kasem Khalil
On reconfigurable fabrics for intelligent hardware systems. 136-139 - Erhan Akan, Hakan Tora, Baran Uslu:
Hand gesture classification using inertial based sensors via a neural network. 140-143 - K. K. Emre Aki, Tugba Erkoç
Subset selection for tuning of hyper-parameters in artificial neural networks. 144-147
AMM-3 Analog Filters
- Ersin Alaybeyoglu, Hakan Kuntman:
A new current mode implementation of the reconfigurable analog baseband low pass filter with cell-based variable transconductance amplifier. 148-151 - Montree Kumngern, Usa Torteanchai, Fabian Khateb
0.5-V bulk-driven quasi-floating gate transconductance amplifier. 152-155 - Roman Sotner
Design of integer/fractional-order filter with electronically reconfigurable transfer response. 156-159 - Dinesh Prasad, Mayank Srivastava:
Novel Ms⁁2 type FDNR simulation configuration with electronic control and grounded capacitances. 160-164 - Huseyin Ozgur Kazanci:
Integrator with p-channel depletion MOS switch. 165-169
COM-3 FPGA Applications
- Atef Dorai, Olivier Sentieys, Hélène Dubois:
Evaluation of NoC on multi-FPGA interconnection using GTX transceiver. 170-173 - Miguel Carvalho, Mário Lopes Ferreira
FPGA-based implementation of a frequency spreading FBMC-OQAM baseband modulator. 174-177 - Fakhreddine Ghaffari, Burak Unal
Efficient FPGA implementation of probabilistic gallager B LDPC decoder. 178-181 - Josef Magri, Owen Casha
HLTB design for high-speed multi-FPGA pipelines. 182-185
ETD-1 Emerging Systems
- Calebe Conceição, Gisell Moura, Filipe Pisoni, Ricardo Reis
A cell clustering technique to reduce transistor count. 186-189 - Martin Schubert, S. Seign, Q. Dai, S. Hinterseer, F. Pielmeier, A. Pietsch, C. Seebauer, J. Weis, C. Yu, S. Zenger:
Capacitive sensor technology for soil moisture monitoring networks. 190-193 - Oguzhan Cicekoglu, Norbert Herencsar
Supplementary MOS-only butterworth LP BP filter circuits. 194-197 - Yasser Moursy, Anthony Quelen, Gaël Pillonnet
Challenges for fully-integrated resonant switched capacitor converters in CMOS technologies. 198-201 - Binboga Siddik Yarman
Simplified sympes codec with positive DC offset. 202-205
LNL-3 Non-Linear Systems
- Denis N. Butusov
Study of two-memristor circuit model with explicit composition method. 206-209 - Ferit Acar Savaci
Stochastic bifurcation in generalized chua's circuit through alpha-stable levy noise. 210-213 - Anakha V. Babu, Bipin Rajendran:
Stochastic deep learning in memristive networks. 214-217 - Panagiotis Kassanos
A CMOS programmable phase shifter for compensating synchronous detection bioimpedance systems. 218-221 - Hitesh Shrimali, Vijender Kumar Sharma
Nonlinear modeling and analysis of buck converter using volterra series. 222-226
Invited Special Session
- Mahmut Burak Karadeniz, Mustafa Altun
Sampling based random number generator for stochastic computing. 227-230
AMM-4 Analog Circuits
- Ryuichi Enomoto, Tetsuya Iizuka, Toru Nakura, Kunihiro Asada:
An ultra-wide-range fine-resolution two-step time-to-digital converter with built-in foreground coarse gain calibration. 231-234 - Amir Mahdavi
A low phase noise CMOS oscillator with tail current-shaping technique in wireless implantable SoC applications. 235-238 - Takayuki Okazawa, Ippei Akita
A robust and low-power synchronization technique of coarse-and-fine conversion parts in ring-oscillator-based time-to-digital converters. 239-242 - Eduardo Bejar, Julio Saldana, Erick Raygada, Carlos Silva:
On the jitter-to-fast-clock-period ratio in oscillator-based true random number generators. 243-246
COM-4 Communications
- Sercan Yalçin
Performance analysis of the energy efficient clustering models in wireless sensor networks. 247-251 - Leonardo Rezende Juracy
XGT4: An industrial grade, open source tester for multi-gigabit networks. 252-255 - Omer Aydin, Tugrul Akyuz:
A novel time-slot assignment method in fully mesh networks. 256-259 - Mayu Kobayashi, Yuya Masui, Takao Kihara, Tsutomu Yoshimura:
Spur reduction by self-injection loop in a fractional-N PLL. 260-263 - Mostafa A. Foda, Mohamed A. Abd El-Ghany, Klaus Hofmann:
Efficient polynomial regression algorithm for LTE turbo decoding. 264-269
ETD-2 Technics in Emerging Technologies
- Ygor Q. Aguiar
Temperature dependence and ZTC bias point evaluation of sub 20nm bulk multigate devices. 270-273 - Timur Ibrayev, Olga Krestinskaya
Design and implication of a rule based weight sparsity module in HTM spatial pooler. 274-277 - Sotoudeh Hamedi-Hagh:
The art of extracting circuit transfer functions with SuTra analyses. 278-281 - Y. Q. de Aguiar
SET response of FinFET-based majority voter circuits under work-function fluctuation. 282-285 - Seyed Ali Sedigh Ziabari, Reza Meshkin
Analytical modeling of transconductance in organic thin-film transistors. 286-289
VLSI-1 Systems Perspective
- Samuel Presa Toledo, Alexandra L. Zimpeck, Ricardo Reis
Impact of schmitt trigger inverters on process variability robustness of 1-Bit full adders. 290-293 - Giane Ulloa, Vinicius Lucena, Cristina Meinhardt
Comparing 32nm full adder TMR and DTMR architectures. 294-297 - Morgana Macedo, Leonardo Bandeira Soares, Bianca Silveira, Cláudio Machado Diniz, Eduardo A. C. da Costa
Exploring the use of parallel prefix adder topologies into approximate adder circuits. 298-301 - Andre N. Sapper, Leonardo Bandeira Soares, Eduardo Costa
Exploring the combination of number of bits and number of iterations for a power-efficient fixed-point CORDIC implementation. 302-305
AMM-5 Analog Circuits
- Hamza Al Maharmeh, Hani H. Saleh
Assessment of seven reconstruction methods for contemporary compressive sensing. 306-309 - Muhammad Aldacher, Mehdi Nasrollahpour, Sotoudeh Hamedi-Hagh:
A low-power, high-resolution, 1 GHz differential comparator with low-offset and low-kickback. 310-313 - Leandro S. Heck, Matheus T. Moreira, Ney Laert Vilar Calazans
Hardening C-elements against metastability. 314-317 - Masahiro Kano, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada:
A triangular active charge injection scheme using a resistive current for resonant power supply noise suppression. 318-321 - Dmitry Osipov, Steffen Paul:
Compact first order temperature-compensated CMOS current reference. 322-325 - Abdolsamad Hamidi, Shahram Karimi
Digital FCS-MP control of an AC-DC power converter to improve dynamic response. 326-329
VLSI-2 Realization
- Kasem Khalil
Self-healing router architecture for reliable network-on-chips. 330-333 - Huda Goian, Aamna Alali, Temesghen Habte, Hani H. Saleh
A 65nm ASIC design for measuring mental stress from the heart rate variations. 334-338 - François Bertrand, Abdelkarim Cherkaoui, Jean Simatic, Anthony Maure, Laurent Fesquet:
CAR: On the highway towards de-synchronization. 339-343 - Amirhossein Moshrefi, Hossein Aghababa, Omid Shoaei:
An aging-aware model for the leakage power of nanoscaled digital integrated circuits in IoT era. 343-346
ADP-2 Imaging
- Konstantinos Pexaras, Christos Tsiourakis, Irene G. Karybali, Emmanouil Kalligeros:
Optimization and hardware implementation of image watermarking for low cost applications. 347-350 - Mohamed Buke, Hakan Tora, Erhan Gokcay
Effect of secret image transformation on the steganography process. 351-355 - Ales Rocek, Michal Javorník, Karel Slávicek
Reversible watermarking in medical imaging with zero distortion in ROI. 356-359 - Javier E. Soto, Wladimir E. Valenzuela
An intelligent readout integrated circuit (iROIC) with on-chip local gradient operations. 360-362 - Andrea Schwandt
Modular evaluation system for low-power applications: Educating undergraduate students in advanced digital design. 364-367
AMM-6 Analog Mixed Mode Circuits
- Yuya Nishio
A 28μm2, 0.11Hz, 4.5pW gate leakage timer using differential leakage technique in 55nm DDC CMOS for small-footprint, low-frequency and low-power timing generation. 368-371 - A. Çagri Arli, Ayse Colak, Orhan Gazi:
The implementation of a successive cancellation polar decoder on Xilinx System Generator. 372-376 - Aigerim Tankimanova, Akshay Kumar Maan, Alex Pappachen James
Level-shifted neural encoded analog-to-digital converter. 377-380 - Marcos L. L. Sartori
Go functional model for a RISC-V asynchronous organisation - ARV. 381-384 - Mariem Kanoun, David Cordeau
A 5.9 GHz RF rectifier for wireless power transmission applications. 385-388
EDA-1 Digital Applications
- Samira Reihanian, Amin Zollanvari
Adaptive face space models with dynamic neural priors and sparse coding. 389-392 - Gennaro Severino Rodrigues, Felipe Rosa, Fernanda Lima Kastensmidt, Ricardo Reis
Investigating parallel TMR approaches and thread disposability in Linux. 393-396 - Alavi Kunhu, Hussain Al-Ahmad
Medical images protection and authentication using hybrid DWT-DCT and SHA256-MD5 hash functions. 397-400 - Maximiliano Bueno-Lopez
Analysis of neural activity from EEG data based on EMD frequency bands. 401-405 - Kei Ikeda, Atsuki Kobayashi, Kiichi Niitsu
A scalable time-domain biosensor array using a capacitor-less CMATC and logarithmic cyclic time-attenuation-based TDC with discharge acceleration for high-spatial-resolution bio-imaging. 406-409
BEC Bio-Devices
- Atit Tamtrakarn:
A 115V bi-phasic pulse electrical muscle stimulator by using inductor-sharing dual-output boost converter with supply-stepping switch driver. 410-413 - Ayesha AlHosani, Sara AlShizawi, Shayma AlAli, Hani H. Saleh
Automatic detection of coronary artery disease (CAD) in an ECG signal. 414-418 - Mojtaba Daliri:
A new bio-implantable transmitter topology for minimizing the antenna effects. 419-422 - Leontiy K. Samoilov
Research of peak detector limiting characteristics for analog interface in impedance spectroscopy systems. 423-426
LPE-1 Low Power & Energy Harvesting
- Takumi Saito, Satoshi Komatsu:
A low-voltage hysteresis comparator for low power applications. 427-430 - Naser Ahmadi Moghaddam, Alireza Maleki
RF energy harvesting system and circuits for charging of wireless devices using spectrum sensing. 431-436 - Ameni Ben Mrad, Michel Auguin, François Verdier, Amal Ben Ameur:
A framework for system level low power design space exploration. 437-441 - Francarl Galea, Owen Casha
A CMOS MPPT power conditioning circuit for energy harvesters. 442-445 - Hadeel Aboueidah, Nasma Abbas, Nadeen El Nachar, Aya Al-Yousef, Mohammad Alhawari
Characterization of RF energy harvesting at 2.4 GHz. 446-449 - Nikolay I. Chernov, Nikolay N. Prokopenko
The application of multi-valued logic elements "minimum" and "maximum" for processing current signals of sensors. 450-453
Special Session - In Memoriam
- B. Siddik Yarman
Design of broadband microwave power amplifiers via Fettweis representation of brune functions. 454-457 - Péter Szolgay:
In memory of Tamás Roska (1940-2014). 458-459 - Erol Sezer:
"Professor of professors" Yılmaz Tokad: "I have always loved academic life": An interview by Erol Sezer, Ph.D. 460-464 - Ljiljana D. Milic, Ljiljana Trajkovic:
Radoslav Horvat and Mirko Milić, founders of circuit theory in former Yugoslavia. 465-468
PS1-Poster Session
- Jeremy Scerri
A MEMS low-IF IQ-mixer in metal MUMPs: Modelling and simulation. 454-457 - Roman Sotner
Arbitrary generation of phase shift by pseudodifferential bilinear sections and their application. 458-461 - Volkan Turgul, Izzet Kale:
All-digital 1550 nm optical aqueous glucose solution measurement system. 462-465 - Bilal Taha, Lilas Alrahis, Tasneem Assaf, Hani H. Saleh
Application-specific processor for local-binary-patterns generation. 466-469 - Amin Safaei, Q. M. Jonathan Wu
System-on-a-chip (SoC)-based hardware acceleration for extreme learning machine. 470-473 - Mahdi Hosseinnejad
A VCO-free low-power fully digital BPSK demodulator for implantable biomedical microsystems. 474-477 - Leandro M. G. Rocha
Framework-based arithmetic core generation to explore ASIC-based parallel binary multipliers. 478-481 - Guilherme Paim
Improved goldschmidt algorithm for fast and energy-efficient fixed-point divider. 482-485 - Gustavo M. Santana
Using efficient adder compressors with a split-radix butterfly hardware architecture for low-power IoT smart sensors. 486-489 - Bianca Silveira, Brunno Abreu, Guilherme Paim
Using adder and subtractor compressors to sum of absolute transformed differences architecture for low-power video encoding. 490-493 - Muhammet Emin Sahin, Hasan Güler:
The design of memristor based high pass filter circuit. 494-497
PS2-Poster Session
- Takanori Sato, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa:
An ultra-low-power supercapacitor voltage monitoring system for low-voltage energy harvesting. 498-501 - Yuto Tsuji, Tetsuya Hirose, Toshihiro Ozaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa:
A 0.1-0.6 V input range voltage boost converter with low-leakage driver for low-voltage energy harvesting. 502-505 - Engin Afacan, Kemal Ozanoglu, Merve Toka:
Aging aware safe operating area investigation of switching converter output stages through 2D plots. 506-509 - Zhenlong Xiao:
Linear feedback in nonlinear circuits. 510-513 - Yiyu Tan, Toshiyuki Imamura:
An energy-efficient FPGA-based matrix multiplier. 514-517 - Tomas Fryza
Instruction-level programming approach for very long instruction word digital signal processors. 518-521 - Brunno Abreu, Guilherme Paim
Exploiting absolute arithmetic for power-efficient sum of absolute differences. 522-525 - Leandro M. G. Rocha
Physical implementation of an ASIC-oriented SRAM-based viterbi decoder. 526-529 - Laurent Beaulieu, Olivier Weppe, Benoit Le Ludec, Florian Lebeau:
Co-verification design flow for HDL languages: A complete development methodology. 530-533 - Onur Tunali
Yield analysis of nano-crossbar arrays for uniform and clustered defect distributions. 534-537 - Lida Kouhalvandi
Design of a high gain telescopic-cascode operational amplifier based on the ZTC operation condition. 538-541 - Lida Kouhalvandi
An improved 2 stage opamp with rail-to-rai! gain-boosted folded cascode input stage and monticelli rail-to-rail class AB output stage. 542-545
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