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26th ARITH 2019: Kyoto, Japan
- Naofumi Takagi, Sylvie Boldo, Martin Langhammer:
26th IEEE Symposium on Computer Arithmetic, ARITH 2019, Kyoto, Japan, June 10-12, 2019. IEEE 2019, ISBN 978-1-7281-3366-9
Keynote 1
- Siegfried M. Rump
:
Error Bounds for Computer Arithmetics. 1-14
Session 1: Numerical Computation and Floating-Point Arithmetic
- Fredrik Johansson:
Faster Arbitrary-Precision Dot Product and Matrix Multiplication. 15-22 - Vincent Lefèvre, Jean-Michel Muller
Accurate Complex Multiplication in Floating-Point Arithmetic. 23-29 - Denis Arzelier, Florent Bréhard, Mioara Joldes:
Exchange Algorithm for Evaluation and Approximation Error-Optimized Polynomials. 30-37 - Julio Villalba-Moreno, Javier Hormigo, Francisco J. Jaime:
Reproducible Summation Under HUB Format. 38-45
Session 2: Arithmetic for Cryptography 1
- Libey Djath, Karim Bigou
Hierarchical Approach in RNS Base Extension for Asymmetric Cryptography. 46-53 - Danila A. Gorodecky, Tiziano Villa:
Efficient Implementation of Modular Division by Input Bit Splitting. 54-60
Session 3: Arithmetic for Machine Learning and Graphics
- Andrew Anderson, Michael Doyle, David Gregg:
Scalar Arithmetic Multiple Data: Customizable Precision for Deep Neural Networks. 61-68 - Greg Henry, Ping Tak Peter Tang, Alexander Heinecke:
Leveraging the bfloat16 Artificial Intelligence Datatype For Higher-Precision Computations. 69-76 - Álvaro Vázquez, Elisardo Antelo:
New 3D Projection Transformation for Point Clouds. 77-83
Session 4: Special Session - Industrial Arithmetic
- Himanshu Kaul, Mark A. Anders, Sanu Mathew, Seongjong Kim, Ram Krishnamurthy:
Optimized Fused Floating-Point Many-Term Dot-Product Hardware for Machine Learning Accelerators. 84-87 - Neil Burgess, Jelena Milanovic, Nigel Stephens, Konstantinos Monachopoulos, David Mansell:
Bfloat16 Processing for Neural Networks. 88-91 - Ankur Agrawal, Bruce M. Fleischer, Silvia M. Mueller, Xiao Sun
DLFloat: A 16-b Floating Point Format Designed for Deep Learning Training and Inference. 92-95 - Marius Cornea:
New Technologies for Improved Computing. 96 - David Raymond Lutz
ARM Floating Point 2019: Latency, Area, Power. 97-98
Keynote 2
- Andrew Ensor:
Big Numbers for a Big Universe. 99
Session 5: Short Paper and Student Session
- David W. Matula, Zizhen Chen:
Precise and Concise Graphical Representation of the Natural Numbers. 100-103 - Andrea Bocco, Yves Durand, Florent de Dinechin:
Dynamic Precision Numerics Using a Variable-Precision UNUM Type I HW Coprocessor. 104-107 - Hyun Jin Kim, Min Soo Kim, Alberto A. Del Barrio
A Cost-Efficient Iterative Truncated Logarithmic Multiplication for Convolutional Neural Networks. 108-111 - Mark G. Arnold, Ioannis Kouretas, Vassilis Paliouras
Under- and Overflow Detection in the Residue Logarithmic Number System. 112-115 - Brian J. Hickmann, Dennis Bradford:
Experimental Analysis of Matrix Multiplication Functional Units. 116-119 - Tomonori Kouya
Performance Evaluation of an Efficient Double-Double BLAS1 Function With Error-Free Transformation and its Application to Explicit Extrapolation Methods. 120-123
Invited Student Presentation
- Katherine Parry
A Perspective into Squarer Optimization. 124
Session 6: Adders and Multipliers
- Kumar Sambhav Pandey, B. Dinesh Kumar
An Ultra-Fast Parallel Prefix Adder. 125-134 - Ghassem Jaberipur, Sahar Moradi Cherati
Modulo-(2^n+3) Parallel Prefix Addition via Diminished-3 Representation of Residues. 135-142 - Jihee Seo, Dae Hyun Kim:
High-Throughput Multiplier Architectures Enabled by Intra-Unit Fast Forwarding. 143-150 - Florent de Dinechin, Silviu-Ioan Filip, Martin Kumm, Luc Forget:
Table-Based versus Shift-And-Add Constant Multipliers for FPGAs. 151-158
Session 7: Error Analysis and Verification
- Mak Andrlon
Optimal Bounds for Floating-Point Addition in Constant Time. 159-166 - Anastasia Volkova, Jean-Michel Muller
Semi-Automatic Implementation of the Complementary Error Function. 167-174 - Thibault Hilaire, Hacene Ouzia, Benoit Lopez:
Optimal Word-Length Allocation for the Fixed-Point Implementation of Linear Filters and Controllers. 175-182 - Guillaume Melquiond
Formal Verification of a State-of-the-Art Integer Square Root. 183-186
Session 8: Special Session - Automatic Datapath Generators
- Florent de Dinechin:
Reflections on 10 Years of FloPoCo. 187-189 - François Serre, Markus Püschel:
DSL-Based Modular IP Core Generators: Example FFT and Related Structures. 190-191 - David B. Thomas
Compile-Time Generation of Custom-Precision Floating-Point IP using HLS Tools. 192-193 - Bogdan Pasca
Hybrid Dot-Product Design for FP-Enabled FPGAs. 194-196
Keynote 3
- Kurt Rohloff:
Computer Arithmetic Research to Accelerate Privacy-Protecting Encrypted Computing Such as Homomorphic Encryption. 197 - Shiho Moriai:
Privacy-Preserving Deep Learning via Additively Homomorphic Encryption. 198
Session 9: Arithmetic for Cryptography 2
- Laurent-Stéphane Didier, Fangan-Yssouf Dosso, Nadia El Mrabet, Jérémy Marrez, Pascal Véron
Randomization of Arithmetic Over Polynomial Modular Number System. 199-206 - Paulo Martins, Jérémy Marrez, Jean-Claude Bajard
HyPoRes: An Hybrid Representation System for ECC. 207-214 - Dusan Kostic, Shay Gueron:
Using the New VPMADD Instructions for the New Post Quantum Key Encapsulation Mechanism SIKE. 215-218
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