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24th MIXDES 2017: Bydgoszcz, Poland
- 24th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2017, Bydgoszcz, Poland, June 22-24, 2017. IEEE 2017, ISBN 978-83-63578-12-1
- José M. de la Rosa
:
Emerging sigma-delta modulation techniques for an efficient digitization in the Internet of Things. 15-16 - Tohru Mogami
High-performance silicon photonics platform for low-power photonic integrated circuits. 17-18 - Yoichi Shimeno:
Introduction of Analog Front End IC used in sensing system. 19-20 - Wieslaw Kuzmicz
The future of CMOS: More Moore or the next big thing? 21-26 - Tatsuji Matsuura:
Integrated CMOS ADC - Tutorial review on recent hybrid SAR-ADCs. 29-34 - Takamoto Watanabe, Hideaki Ishihara, Tomoyasu Ito:
Sensor/RF digitization for IoT-applications using all-digital-very-scalable-ADC TAD. 35-40 - Hideki Asai
SI/PI/EMI simulation techniques and application to automotive electronic design issues. 41-44 - Chunhui Pan, Hao San
A 2nd-order ΔΣAD modulator using ring amplifier and SAR quantizer with simplified operation mode. 45-49 - Shuta Masuda, Satoshi Saikatsu, Michitaka Yoshino, Akira Yasuda:
A delta-sigma DAC with feedforward jitter-shaper reducing jitter noise. 50-54 - Fujihiko Matsumoto, Takeshi Ohbuchi
A design method of low frequency universal filter employing MOCCIIs. 55-60 - Kengo Ando, Takahiro Kate, Satoshi Saikatsu, Akira Yasuda:
A high precision vernier type delta-sigma time to digital converter. 61-66 - Tatsuya Abe, Hiroshi Tanimoto, Shingo Yoshizawa:
A simple current reference with low sensitivity to supply voltage and temperature. 67-72 - Hideki Akiyama, Sogami Yasutaka, Akira Yasuda, Saikatu Satoshi:
An application for tree structure NSDEM to a directivity speaker with amplitude controlling a digitally direct driven speaker. 73-78 - Ryszard Wojtyna:
Applying negative feedback to improve linearity and input property of analog CMOS transresistor. 79-83 - Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa:
Comparator design for linearized statistical flash A-to-D converter. 84-89 - Shun Kozuki, Nicodimus Retdian, Takeshi Shima:
Experimental study of the oscillation mode of the coupled oscillator ORIGAMI for TDC. 90-94 - Takeshi Ohbuchi
Improvement technique of tuning range for local-feedback MOS transconductor. 95-100 - Shigetaka Takagi, Hiroki Sato:
Low-distortion low-power MOSFET-C filter design method. 101-104 - Kota Inoue, Tatsuji Matsuura, Akira Hyogo, Hao San
Non-binary cyclic and binary SAR hybrid ADC. 105-109 - Yasuhiro Takahashi
Operational amplifier based LC resonant circuit for adiabatic logic. 110-113 - Daisuke Kuramoto, Toshihiko Hamasaki:
Self-calibrated analog-front-end circuitry for ultra low power strain sensors. 114-118 - Hubert Hara, Grzegorz Gluszko, Daniel Tomaszewski
A test structure for characteriation of the shallow piezoresistor-based strain sensors. 121-126 - Michael Graef, Franziska Hain, Fabian Hosenfeld, Fabian Horst, Atieh Farokhnejad
Analytical modeling of RDF effects on the threshold voltage in short-channel double-gate MOSFETs. 127-131 - Grzegorz Gluszko, Daniel Tomaszewski
Electrical characterization of different types of transistors fabricated in VeSTIC process. 132-136 - Mike Brinson, Vadim Kuznetsov:
Improvements in Qucs-S equation-defined modelling of semiconductor devices and IC's. 137-142 - Fabian Hosenfeld, Fabian Horst, Alexander Kloes, Benjamín Iñíguez, François Lime
Non-iterative NEGF based model for band-to-band tunneling current in DG TFETs. 143-148 - Mike Schwarz, John P. Snyder, Tillmann Krauss, Udo Schwalke, Laurie E. Calvet, Alexander Kloes:
Simulation framework for barrier lowering in Schottky barrier MOSFETs. 149-153 - Dominik Kasprowicz
Variability-aware table-based DC model of a dual-gate transistor. 154-158 - Rolando Ingles, Mariusz Orlikowski
A C++ shared-memory ring-buffer framework for large-scale data acquisition systems. 161-166 - Dariusz Makowski
Development of complex systems for high-energy physics. 167-172 - Pawel Plewinski, Dariusz Makowski
Human machine interface for high energy physics experiments. 173-177 - Aleksander Szubert, Dariusz Makowski
Universal module management controller for MicroTCA.4 systems. 178-181 - Luca Marchetti, Yngvar Berg, Mehdi Azadmehr:
A bidirectional front-end with bandwidth control for actuation and read-out of MEMS resonating sensors. 185-188 - Zbigniew Jaworski
A highly linear 4-bit DAC with 1 GHz sampling rate implemented in 28 nm FD-SOI process. 189-195 - Decio R. M. Faria, Robson L. Moreno
A low energy pulse interval modulation for implantable devices. 196-199 - Arkadiusz W. Luczyk:
A method to manage unknown values generation and propagation during gate level simulations of multi-clock digital circuits. 200-204 - Ali Baradaran Rezaeii, Faeze Noruzpur, Sina Mahdavi:
A novel APS pixel level rearrangement to increase the fill factor and SNR in 0.35μm CMOS technology. 205-210 - Piotr Otfinowski
Algorithms for elimination of charge sharing effects in single photon counting pixel detectors. 211-214 - Viorel Bucur, Gabriel Banarie, Stefan Marinca, Mircea Bodea:
An embedded charge pump for a Zener-based voltage reference compensated using a ΔVBE stack. 215-219 - Sarang Kazeminia
An extendable global clock high-speed binary counter compatible to the FPGA CLBs. 220-223 - Jerzy Jegier, Pawei Kemtopf:
Application of the maximum weighted matching to quantum cost reduction in reversible circuits. 224-228 - Qing K. Zhu:
Automated diagnosis of HV/LV and floating gate faults in VLSI design. 229-233 - Weronika Zubrzycka
Biasing potentials monitoring circuit for multichannel radiation imaging ASIC in-system diagnostics. 234-239 - Lukasz A. Kadlubowski
Design of 4Gbps SLVS-type transmitter in 55 nm CMOS. 240-244 - Krzysztof Swientek, Magdalena Banachowicz:
Design of memory subsystem for wide input data range in the SALT ASIC. 245-249 - Kamil Mielcarek
Designing HFPGA-based Mealy FSMs with transformation of output functions. 250-253 - Alexander Barkalov, Larysa Titarenko, Jacek Bieganowski:
Designing HFPGA-based FSMs with counters. 254-257 - Michal Wysocki, Krzysztof Siwiec
EIA/TIA-485 transceiver in standard 130 nm CMOS technology. 258-263 - Andreas Rauchenecker, Timm Ostermann, Robert Wille:
Exploiting reversible logic design for implementing adiabatic circuits. 264-270 - Kamil Rudnicki, Tomasz P. Stefanski
FPGA implementation of the multiplication operation in multiple-precision arithmetic. 271-275 - Pawel Poczekajlo
Hardware implementation of 3D pipelined laplace filter based on rotation structures. 276-280 - Elvio Mendes, Luís Bica Oliveira
Low frequency CMOS two-integrator oscillator for IoT applications. 281-284 - Krzysztof Kasinski
Microstrip and gas electron multiplier readout ASIC for physics experiment at FAIR. 285-289 - Cezary Kolacinski
Multichannel integrated lock-in amplifier for low noise measurements. 290-295 - Marek Bogdan Zaradny:
On the bandpass/lowpass microwave/RF filter simplified solution of the lumped-distributed network realization. 296-301 - Angelos Papadimitriou, Matthias Bucher
Optimization of RF low noise amplifier design using analytical model and genetic computation. 302-307 - Grzegorz Jablonski
Performance estimation of Lattice Boltzmann method implementation in ARUZ. 308-313 - Robert Suszynski:
Quick method for parameter research of higher order sigma-delta modulators using dynamically reprogrammable FPAA. 314-317 - Roman Sotner
Single active parameter tunable simple band-pass filter: Methods for tunability range extension. 318-323 - Piotr Maj
Single photon counting integrated circuit operating with CdTe pixel detector. 324-327 - Pawel Narczyk, Krzysztof Siwiec
Temperature calibration technique based on on-chip resistor. 328-332 - Adama Samake, Piotr Kocanda, Andrzej Kos:
A notebook arrangement in aspect of throughput increase. 325-340 - Pawel Fluder, Pawel Marzec, Andrzej Kos:
Compact model of microprocessor cooling system based on ambient circumstanes. 341-344 - Krzysztof Górecki, Krzysztof Gorski:
Compact thermal model of planar transformers. 345-350 - Tomasz Raszkowski, Agnieszka Samson, Tomasz Torzewicz, Piotr Zajac
Comparative analysis of compact thermal models generated from measured thermal responses and detailed thermal models. 351-354 - Pawel Górecki
Investigation of the influence of thermal phenomena on characteristics of IGBTs contained in power modules. 355-359 - Pawel Marzec, Pawel Fluder, Andrzej Kos:
Measurement of microprocessor throughput increase with new control system. 360-365 - Krzysztof Górecki
Modelling the influence of weather conditions on properties of the photovoltaic installation. 366-371 - Adama Samake, Piotr Kocanda, Andrzej Kos:
Optimisation of Ivy Bridge topography. 372-375 - Gilbert De Mey, Boguslaw Wiecek
Oscillatory behaviour of transient thermal problems in microelectronics. 376-378 - Piotr Zajac
Thermal coupling phenomenon in ICs cooled by integrated microchannels. 379-383 - Sina Mahdavi, Faeze Noruzpur, Esmaii Ghadimi, Tohid Moradi Khanshan:
A new fast rail-to-rail continuous-time common-mode feedback circuit. 387-391 - Michal Zaborowski, Daniel Tomaszewski
Detection of THz radiation by SOI sensors influence of doping and polarization on output signal. 392-397 - Daniel Pietron, Tomasz Borejko, Krzysztof Siwiec
Importance of on-chip inductor modeling in radio frequency integrated circuits. 398-403 - Oleksii Chkalov, Oleksandr Beznosyk, Bogdan Kyriusha, Oleksii Finogenov:
Lumped parameter model of a capacitive micro-machined ultrasound transducer. 404-407 - Emna Chabchoub, Franck Badets
New time-domain conditioning circuit for resistive sensor: Behavioral modelling for simulation and optimization. 408-411 - Timm Ostermann:
On power BSD test of integrated circuits. 412-415 - Andrzej Malcher
Resistorless universal biquad filter based on digitally programmable current follower transconductance amplifier. 416-421 - Jacek Nazdrowicz:
Simulations and analysis of microgyroscope response in drive and sense directions. 422-428 - Jacek Nazdrowicz:
SIMULINK and COMSOL software application for MEMS accelerometer modeling and simulation. 429-434 - Krzysztof Kasinski
Thermal and power delivery considerations of the 65k pixel 3-D integrated radiation imaging module with through-silicon vias. 435-439 - Marcin Lebioda
Analysis of thermal and electrical properties of heating microsystems based on TCO layers. 443-446 - Ewa Korzeniewska
Elements of elastic electronics created on textile substrate. 447-450 - Artjom Jasnetski, Raimund Ubar
Automated software-based self-test generation for microprocessors. 453-458 - Ryszard Pawlak
Durability and reliability enhancement of selected electronic components achieved by laser technologies. 459-462 - Krzysztof Wawryn
Prototyping of WTA ANNs using FPAA devices. 463-467 - Marcin Cholewa:
Shannon information entropy as complexity metric of source code. 468-471 - Witold Maranda
Diagrams for energy management in renewable energy systems. 475-478 - Jacek Kaczmarek, Robert Suszynski:
Digital control buck converter - Reducing the impact of load change on the output voltage. 479-483 - Andrii Stefanskyi, Lukasz Starzak
Review of commercial SiC MOSFET models: Topologies and equations. 484-487 - Andrii Stefanskyi, Lukasz Starzak
Review of commercial SiC MOSFET models: Validity and accuracy. 488-493 - Jacek Kaczmarek, Robert Suszynski:
Undesirable sub-harmonic currents in the coil of buck converter prototype - Project bumblebee. 494-497 - Marta Kolasa
A serial distance calculation circuit for the application in artificial neural networks and pattern recognition. 501-504 - Jakub Warczarek, Pawel Sniataia:
Camera callibration and object size/distance calculation application. 505-508 - Robert Wielgat
Correlational and regressive analysis of the relationship between tongue and lips motion - An EMA and video study of selected polish speech sounds. 509-514 - Marek Bogdan Zaradny:
Direct-coupled-resonators bandpass filters with arbitral end-coupled-series-immittances: Aspect of the couplings among terminations and resonators with arbitral non-inertive and inertive immittnaces and J-inverters. 515-520 - Tomasz Talaska
Hardware implementation of the particle swarm optimization algorithm. 521-526 - Jiri Petrzela:
New network structures of reconfigurable fractional-order PID regulators with DVCC. 527-531 - Tomasz Pander
OWA aggregation operator in robust filtering. 532-536 - Jacek Kaczmarek, Robert Suszynski:
Semi-analytical recursive algorithms of convolution calculations for digitally controlled buck converter design. 537-542 - Ihor Javorskyj
Statistical analysis of periodically non-stationary oscillations for unknown period. 543-546 - Kazimierz Krzywicki
CloudBus protocol hardware multi-converter gateway for distributed embedded systems. 549-552 - Marcin Lewandowski, Tomasz Orczyk
Dedicated AVR bootloader for performance improvement of prototyping process. 553-557 - Dariusz Obrebski, Michal Zbiec:
Development of the sensor network for building technologies. 558-563 - Zbigniew Mudza, Rafal Kielbik
Instructionless general purpose coarse-grained reconfigurable processor performance in encryption. 564-568 - Norbert Henzel, Janusz Wrobel
Atrial fibrillation episodes detection based on classification of heart rate derived features. 571-576 - Barbara Szuster, Zbigniew Szczurek, Dawid Roj, Aleksander Sobotnicki
Bioimpedance spectroscopy monitoring - Designing challenges and description of the acquired results. 577-580 - Danylo Lizanets, Jan A. Dziuban, Rafal Walczak:
Comparison of algorithms for detection and real-time tracking of living microorganisms in lab-on-a-chip devices. 581-584 - Dawid Roj, Janusz Wrobel
Control and signal processing software embedded in smart wristband monitor of silent atrial fibrillation. 585-590 - Pawel Turcza:
Distributed-arithmetic-based DWT processor for neural recording systems. 591-595 - Dawid Roj, Janusz Wrobel
Hardware design issues and functional requirements for smart wristband monitor of silent atrial fibrillation. 596-600 - Arkadiusz W. Luczyk, Konrad Neneman, Witold A. Pleskacz:
Principal component analysis of accelerations in human dynamic movements: A sample set length effect study. 601-606
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