default search action

combined dblp search
author search
venue search
publication search

ask others

"Modular Design of High-Efficiency Hardware Median Filter Architecture."

Shih-Hsiang Lin, Pei-Yin Chen, Chih-Kun Hsu (2018)

> Home

Details and statistics

DOI: 10.1109/TCSI.2017.2770216

access: closed

type: Journal Article

metadata version: 2020-05-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcas/LinCH18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcas/LinCH18
Shih-Hsiang Lin, Pei-Yin Chen, Chih-Kun Hsu:
Modular Design of High-Efficiency Hardware Median Filter Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(6): 1929-1940 (2018)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.