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"An Adaptive Interconnect-Length Driven Placer."

Chi-Ming Tsai et al. (2002)

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DOI: 10.1109/ASPDAC.2002.994953

access: closed

type: Conference or Workshop Paper

metadata version: 2022-11-14

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  dblp key:
  - conf/vlsid/TsaiKHL02
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/TsaiKHL02
Chi-Ming Tsai, Kun-Tien Kuo, Chyi-Hui Hong, Rung-Bin Lin:
An Adaptive Interconnect-Length Driven Placer. ASP-DAC/VLSI Design 2002: 393-398

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