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"Path Delay Fault Test Set for Two-Rail Logic Circuits."

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Kazuteru Namba, Hideo Ito (2008)

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DOI: 10.1109/PRDC.2008.8

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Kazuteru Namba, Hideo Ito:
Path Delay Fault Test Set for Two-Rail Logic Circuits. PRDC 2008: 347-348

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last updated on 2023-03-23 23:59 CET by the dblp team

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