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"PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC."

Lucas Grativol et al. (2024)

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DOI: 10.1109/ISCAS58744.2024.10557995

access: closed

type: Conference or Workshop Paper

metadata version: 2024-07-16

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  dblp key:
  - conf/iscas/GrativolGLML0FA24
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  - https://dblp.org/rec/conf/iscas/GrativolGLML0FA24
Lucas Grativol, Lubin Gauthier, Mathieu Léonardon, Jérémy Morlier, Antoine Lavrard-Meyer, Guillaume Muller, Virginie Fresse, Matthieu Arzel:
PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC. ISCAS 2024: 1-5

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