default search action

combined dblp search
author search
venue search
publication search

ask others

"Activity profile driven simultaneous vt assignment and power switch sizing ..."

Ashoka Visweswara Sathanur et al. (2010)

> Home

Details and statistics

DOI: 10.1109/ICECS.2010.5724563

access: closed

type: Conference or Workshop Paper

metadata version: 2022-06-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/icecsys/SathanurHSG10
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/icecsys/SathanurHSG10
Ashoka Visweswara Sathanur, Jos Huisken, Jan Stuyt, Harmke de Groot:
Activity profile driven simultaneous vt assignment and power switch sizing for leakage power minimization in nanometer CMOS designs. ICECS 2010: 519-522

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.