default search action
Gwan S. Choi
Person information
- affiliation: Texas A&M University, College Station, Texas, USA
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2022
- [j18]Sina Pourjabar
, Gwan S. Choi:
A high-throughput multimode low-density parity-check decoder for 5G New Radio. Int. J. Circuit Theory Appl. 50(4): 1365-1374 (2022) - 2021
- [j17]Sina Pourjabar
CVR: A Continuously Variable Rate LDPC Decoder Using Parity Check Extension for Minimum Latency. J. Signal Process. Syst. 93(8): 855-862 (2021) - 2020
- [c58]Pravir Singh Gupta
Drcas: Deep Restoration Network For Hardware Based Compressive Acquisition Scheme. ICIP 2020: 291-295
2010 – 2019
- 2019
- [i9]Pravir Singh Gupta, Xin Yuan, Gwan Seong Choi:
LISR: Image Super-resolution under Hardware Constraints. CoRR abs/1909.10136 (2019) - 2018
- [j16]Yoon Seok Yang
SDPR: Improving Latency and Bandwidth in On-Chip Interconnect Through Simultaneous Dual-Path Routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(3): 545-558 (2018) - 2017
- [i8]Ehsan Rohani, Gwan Choi, Mi Lu:
The Normalized Singular Value Decomposition of Non-Symmetric Matrices Using Givens fast Rotations. CoRR abs/1707.05189 (2017) - 2016
- [c57]Tiben Che, Jingwei Xu, Gwan S. Choi:
TC: Throughput centric successive cancellation decoder hardware implementation for polar codes. ICASSP 2016: 991-995 - [c56]Tiben Che, Jingwei Xu, Gwan S. Choi:
Overlapped list successive cancellation approach for hardware efficient polar code decoder. ISCAS 2016: 2463-2466 - [i7]Mehnaz Rahman, Gwan S. Choi:
Hardware Architecture of Complex K-best MIMO Decoder. CoRR abs/1602.06009 (2016) - [i6]Tiben Che, Gwan S. Choi:
An Efficient Partial Sums Generator for Constituent Code based Successive Cancellation Decoding of Polar Codes. CoRR abs/1611.09452 (2016) - [i5]Tiben Che, Gwan S. Choi:
An Encoding Scheme with Constituent Codes Optimization for Polar Code-Aim to Reduce the Decoding Latency. CoRR abs/1612.02545 (2016) - 2015
- [j15]Tiben Che, Jingwei Xu, Gwan Choi:
Accelerated Dual-Path Asynchronous Circuit. IEEE Trans. Circuits Syst. II Express Briefs 62-II(9): 856-860 (2015) - [c55]Jingwei Xu, Tiben Che, Gwan S. Choi:
XJ-BP: Express Journey Belief Propagation Decoding for Polar Codes. GLOBECOM 2015: 1-6 - [c54]Jingwei Xu, Gwan S. Choi:
Compressive sensing and reception for MIMO-OFDM based cognitive radio. ICNC 2015: 884-888 - [c53]Mehnaz Rahman, Ehsan Rohani, Gwan S. Choi:
An iterative LR-aided MMSE extended soft MIMO decoding algorithm. ICNC 2015: 889-894 - [i4]Mehnaz Rahman, Gwan S. Choi:
Fixed Point Realization of Iterative LR-Aided Soft MIMO Decoding Algorithm. CoRR abs/1503.09166 (2015) - [i3]Jingwei Xu, Tiben Che, Gwan S. Choi:
XJ-BP: Express Journey Belief Propagation Decoding for Polar Codes. CoRR abs/1504.06025 (2015) - [i2]Tiben Che, Jingwei Xu, Gwan S. Choi:
TC: Throughput Centric Successive Cancellation Decoder Hardware Implementation for Polar Codes. CoRR abs/1504.06247 (2015) - [i1]Tiben Che, Jingwei Xu, Gwan S. Choi:
Overlapped List Successive Cancellation Approach for Hardware Efficient Polar Code Decoder. CoRR abs/1511.00577 (2015) - 2014
- [j14]Yoon Seok Yang, Reeshav Kumar, Gwan S. Choi, Paul V. Gratz
WaveSync: Low-Latency Source-Synchronous Bypass Network-on-Chip Architecture. ACM Trans. Design Autom. Electr. Syst. 19(4): 34:1-34:22 (2014) - [c52]Jingwei Xu, Tiben Che, Ehsan Rohani, Gwan Choi:
Asynchronous design for precision-scaleable energy-efficient LDPC decoder. ACSSC 2014: 136-140 - [c51]Mehnaz Rahman, Ehsan Rohani, Gwan S. Choi:
An iterative soft decision based adaptive K-best decoder without SNR estimation. ACSSC 2014: 1016-1020 - [c50]Jingwei Xu, Ehsan Rohani, Mehnaz Rahman, Gwan Choi:
Signal reconstruction processor design for compressive sensing. ISCAS 2014: 2539-2542 - [c49]Ehsan Rohani, Jingwei Xu, Tiben Che, Mehnaz Rahman, Gwan Choi, Mi Lu:
Asynchronous baseband processor design for cooperative MIMO satellite communication. MWSCAS 2014: 833-836 - 2013
- [c48]Reeshav Kumar, Hrishikesh Deshpande, Gwan S. Choi, Alexander Sprintson
Bidirectional interconnect design for low latency high bandwidth NoC. ICICDT 2013: 215-218 - [c47]Shaoda Yu, Peng Li, Honghuang Lin, Ehsan Rohani
Support Vector Machine Based Detection of Drowsiness Using Minimum EEG Features. SocialCom 2013: 827-835 - 2012
- [j13]Yoon Seok Yang, Gwan Choi:
Unequal Error Protection Based on DVFS for JSCD in Low-Power Portable Multimedia Systems. ACM Trans. Embed. Comput. Syst. 11(2): 30:1-30:21 (2012) - [c46]Yoon Seok Yang, Reeshav Kumar, Gwan Choi, Paul Gratz
WaveSync: A low-latency source synchronous bypass network-on-chip architecture. ICCD 2012: 241-248 - [c45]Yoon Seok Yang, Hrishikesh Deshpande, Gwan S. Choi, Paul Gratz
Exploiting path diversity for low-latency and high-bandwidth with the dual-path NoC router. ISCAS 2012: 2433-2436 - 2011
- [j12]Seung Eun Lee, Yoon Seok Yang, Gwan S. Choi, Wei Wu, Ravi R. Iyer:
Low-Power, Resilient Interconnection with Orthogonal Latin Squares. IEEE Des. Test Comput. 28(2): 30-39 (2011) - [j11]Yoon Seok Yang, Gwan Choi:
Design space exploration for low-power channel decoder in embedded LDPC-H.264 joint decoding architecture. Int. J. Inf. Technol. Commun. Convergence 1(4): 372-390 (2011) - [j10]Tushar N. K. Jain, Mukund Ramakrishna, Paul V. Gratz
Asynchronous Bypass Channels for Multi-Synchronous NoCs: A Router Microarchitecture, Topology, and Routing Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(11): 1663-1676 (2011) - [c44]Yoon Seok Yang, Pankaj Bhagawat, Gwan Choi:
Energy-efficient MIMO detection using unequal error protection for embedded joint decoding system. DAC 2011: 579-584 - [c43]Reeshav Kumar, Yoon Seok Yang, Gwan Choi:
Intra-Flit Skew Reduction for Asynchronous Bypass Channel in NoCs. VLSI Design 2011: 238-243 - 2010
- [c42]Tushar N. K. Jain, Paul V. Gratz
Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs. NOCS 2010: 51-58 - [c41]Yoon Seok Yang, Gwan Choi:
Low-power baseband processing for wireless multimedia systems using unequal error protection. WTS 2010: 1-6
2000 – 2009
- 2009
- [j9]Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary:
Comments on "Techniques and Architectures for Hazard-Free Semi-Parallel Decoding of LDPC Codes". EURASIP J. Embed. Syst. 2009 (2009) - [j8]Weihuang Wang, Euncheol Kim, Kiran K. Gunnam
Low-Power VLSI Design of LDPC Decoder Using Dynamic Voltage and Frequency Scaling for Additive White Gaussian Noise Channels. J. Low Power Electron. 5(3): 303-312 (2009) - [j7]Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri, Gwan S. Choi:
Circuit-Level Design Approaches for Radiation-Hard Digital Electronics. IEEE Trans. Very Large Scale Integr. Syst. 17(6): 781-792 (2009) - [c40]Pankaj Bhagawat, Rajballav Dash, Gwan S. Choi:
Array like runtime reconfigurable MIMO detectors for 802.11n WLAN: a design case study. ASP-DAC 2009: 751-756 - [c39]Pankaj Bhagawat, Rajballav Dash, Gwan Choi:
Systolic like soft-detection architecture for 4×4 64-QAM MIMO system. DATE 2009: 870-873 - [c38]Rajballav Dash, Rajesh Garg, Sunil P. Khatri, Gwan S. Choi:
SEU hardened clock regeneration circuits. ISQED 2009: 806-813 - [c37]Weihuang Wang, Gwan S. Choi, Kiran K. Gunnam
Low-Power VLSI Design of LDPC Decoder Using DVFS for AWGN Channels. VLSI Design 2009: 51-56 - 2008
- [j6]Rohit Singhal, Gwan Choi, Rabi N. Mahapatra:
Data Handling Limits of On-Chip Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 16(6): 707-713 (2008) - [c36]Kiran K. Gunnam
Next generation iterative LDPC solutions for magnetic recording storage. ACSCC 2008: 1148-1152 - [c35]Pankaj Bhagawat, Rajballav Dash, Gwan Choi:
High performance on the fly reconfigurable MIMO detector. ACSCC 2008: 1849-1851 - [c34]Pankaj Bhagawat, Rajballav Dash, Gwan Choi:
Dynamically reconfigurable soft output MIMO detector. ICCD 2008: 68-73 - [c33]Pankaj Bhagawat, Rajballav Dash, Gwan Choi:
Architecture for reconfigurable MIMO detector and its FPGA implementation. ICECS 2008: 61-64 - 2007
- [c32]Weihuang Wang, Gwan Choi:
Minimum-energy LDPC decoder for real-time mobile application. DATE 2007: 343-348 - [c31]Pankaj Bhagawat, Weihuang Wang, Momin Uppal, Gwan Choi, Zixiang Xiong, Mark B. Yeary, Alan Harris:
An FPGA Implementation of Dirty Paper Precoder. ICC 2007: 2761-2766 - [c30]Kiran K. Gunnam
VLSI Architectures for Layered Decoding for Irregular LDPC Codes of WiMax. ICC 2007: 4542-4547 - [c29]Kiran K. Gunnam
Multi-Rate Layered Decoder Architecture for Block LDPC Codes of the IEEE 802.11n Wireless Standard. ISCAS 2007: 1645-1648 - [c28]Weihuang Wang, Gwan Choi:
Speculative Energy Scheduling for LDPC Decoding. ISQED 2007: 79-84 - [c27]Sanghoan Chang, Gwan Choi:
Gate-Level Exception Handling Design for Noise Reduction in High-Speed VLSI Circuits. VLSI Design 2007: 109-114 - [c26]Kiran K. Gunnam
A Parallel VLSI Architecture for Layered Decoding for Array LDPC Codes. VLSI Design 2007: 738-743 - 2006
- [c25]Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri, Gwan Choi:
A design approach for radiation-hard digital electronics. DAC 2006: 773-778 - [c24]Sanghoan Chang, Gwan Choi:
Timing Failure Analysis of Commercial CPUs Under Operating Stress. DFT 2006: 245-253 - [c23]Euncheol Kim, Nikhil Jayakumar, Pankaj Bhagawat, Anand Selvarathinam, Gwan Choi, Sunil P. Khatri:
A High-Speed Fully-Programmable VLSI Decoder for Regular LDPC Codes. ICASSP (3) 2006: 972-975 - [c22]Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra:
Information theoretic approach to address delay and reliability in long on-chip interconnects. ICCAD 2006: 310-314 - [c21]Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra:
Information Theoretic Capacity of Long On-chip Interconnects in the Presence of Crosstalk. ISQED 2006: 407-412 - [c20]Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra:
Programmable LDPC Decoder Based on the Bubble-Sort Algorithm. VLSI Design 2006: 203-208 - 2005
- [c19]Pankaj Bhagawat, Momin Uppal, Gwan Choi:
FPGA based implementation of decoder for array low-density parity-check codes. ICASSP (5) 2005: 29-32 - [c18]Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra:
Quantized LDPC decoder design for binary symmetric channels. ISCAS (6) 2005: 5782-5785 - 2004
- [c17]Kiran K. Gunnam
An LDPC decoding schedule for memory access reduction. ICASSP (5) 2004: 173-176 - [c16]Rajeshwary Tayade, Gwan Choi:
Fast Simulation Technique for LDPC Code Analysis. International Conference on Wireless Networks 2004: 707-713 - [c15]Rohit Singhal, Gwan S. Choi, Nathan Mickler, Prabhavati Koteeswaran:
Scaleable check node centric architecture for LDPC decoder. ISCAS (4) 2004: 189-192 - 2003
- [c14]Anand Selvarathinam, Euncheol Kim, Gwan Choi:
Low-Density Parity-Check Decoder Architecture for High Throughput Optical Fiber Channels. ICCD 2003: 520-525 - [c13]Anand Selvarathinam, Gwan Choi, Krishna Narayanan, Achal Prabhakar, Euncheol Kim:
A massively scaleable decoder architecture for low-density parity-check codes. ISCAS (2) 2003: 61-64 - 2001
- [c12]Byeong Min, Gwan Choi:
RTL functional verification using excitation and observation coverage. HLDVT 2001: 58-63 - [c11]Zan Yang, Gwan Choi:
An On-Line Testing Approach Using Code-Perturbation. IOLTW 2001: 142 - [c10]Zan Yang, Byeong Min, Gwan Choi:
Simulation Using Code-Perturbation: Black- and White-Box Approach. ISQED 2001: 44-49 - [c9]Byeong Min, Gwan Choi:
ECC: Extended Condition Coverage for Design Verification Using Excitation and Observation. PRDC 2001: 183-190 - 2000
- [j5]Seung H. Hwang, Gwan S. Choi:
A Reliability Testing Environment for Off-the-Shelf Memory Subsystems. IEEE Des. Test Comput. 17(3): 116-124 (2000) - [j4]Byeong Min, Gwan Choi:
Verification Simulation Acceleration Using Code-Perturbation. J. Electron. Test. 16(1-2): 83-90 (2000) - [c8]Zan Yang, Byeong Min, Gwan Choi:
Si-emulation: system verification using simulation and emulation. ITC 2000: 160-169
1990 – 1999
- 1999
- [j3]Seung H. Hwang, Gwan S. Choi:
Selective-set-invalidation (SSI) for soft-error-resilient cache architecture. SIGARCH Comput. Archit. News 27(3): 4-9 (1999) - 1998
- [c7]Ronjeet Lal, Gwan S. Choi:
Error and Failure Analysis of a UNIX Server. HASE 1998: 232-239 - [c6]Seung H. Hwang, Gwan S. Choi:
On-Chip Cache Memory Resilience. HASE 1998: 240-247 - 1996
- [j2]Hungse Cha, Elizabeth M. Rudnick, Janak H. Patel, Ravishankar K. Iyer, Gwan S. Choi:
A Gate-Level Simulation Environment for Alpha-Particle-Induced Transient Faults. IEEE Trans. Computers 45(11): 1248-1256 (1996) - 1994
- [c5]Gregory L. Ries, Gwan S. Choi, Ravishankar K. Iyer:
Device-Level Transient Fault Modeling. FTCS 1994: 86-94 - 1993
- [c4]Hungse Cha, Elizabeth M. Rudnick, Gwan S. Choi, Janak H. Patel, Ravishankar K. Iyer:
A Fast and Accurate Gate-Level Transient Fault Simulation Environment. FTCS 1993: 310-319 - [c3]Gwan S. Choi, Ravishankar K. Iyer:
Wear-Out Simulation Environment for VLSI Designs. FTCS 1993: 320-329 - [c2]Gwan S. Choi, Ravishankar K. Iyer, Daniel G. Saab:
Fault behavior dictionary for simulation of device-level transients. ICCAD 1993: 6-9 - 1992
- [j1]Gwan S. Choi, Ravishankar K. Iyer:
FOCUS: An Experimental Environment for Fault Sensitivity Analysis. IEEE Trans. Computers 41(12): 1515-1526 (1992)
1980 – 1989
- 1989
- [c1]Gwan Choi, Ravi K. Iyer, Victor Carreno:
FOCUS: an experimental environment for validation of fault-tolerant systems - case study of a jet-engine controller. ICCD 1989: 561-564
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-04-25 05:59 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: