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Chao-Chung Cheng
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2010 – 2019
- 2011
- [j5]Sung-Fang Tsai, Chao-Chung Cheng, Chung-Te Li, Liang-Gee Chen
:
A real-time 1080p 2D-to-3D video conversion system. IEEE Trans. Consumer Electron. 57(2): 915-922 (2011) - [j4]Chia-Kai Liang
Hardware-Efficient Belief Propagation. IEEE Trans. Circuits Syst. Video Technol. 21(5): 525-537 (2011) - 2010
- [j3]Chao-Chung Cheng, Chung-Te Li, Liang-Gee Chen
A novel 2Dd-to-3D conversion system using edge information. IEEE Trans. Consumer Electron. 56(3): 1739-1745 (2010) - [c11]Yen-Chieh Lai, Chao-Chung Cheng, Chia-Kai Liang
Efficient message reduction algorithm for stereo matching using belief propagation. ICIP 2010: 2977-2980 - [c10]Chao-Chung Cheng, Chung-Te Li, Chia-Kai Liang, Yen-Chieh Lai, Liang-Gee Chen
Architecture design of stereo matching using belief propagation. ISCAS 2010: 4109-4112
2000 – 2009
- 2009
- [c9]Chia-Kai Liang, Chao-Chung Cheng, Yen-Chieh Lai, Liang-Gee Chen
Hardware-efficient belief propagation. CVPR 2009: 80-87 - [c8]Chao-Chung Cheng, Chia-Kai Liang
Fast belief propagation process element for high-quality stereo estimation. ICASSP 2009: 745-748 - 2008
- [c7]Chao-Chung Cheng, Chia-Kai Liang
Analysis of belief propagation for hardware realization. SiPS 2008: 152-157 - 2007
- [j2]Yu-Jen Wang, Chao-Chung Cheng, Tian-Sheuan Chang
A Fast Algorithm and Its VLSI Architecture for Fractional Motion Estimation for H.264/MPEG-4 AVC Video Coding. IEEE Trans. Circuits Syst. Video Technol. 17(5): 578-583 (2007) - [c6]De-Wei Li, Chun-Wei Ku, Chao-Chung Cheng, Yu-Kun Lin, Tian-Sheuan Chang
A 61MHz 72K Gates 1280x720 30FPS H.264 Intra Encoder. ICASSP (2) 2007: 801-804 - 2006
- [j1]Chao-Chung Cheng, Tian-Sheuan Chang
An in-place architecture for the deblocking filter in H.264/AVC. IEEE Trans. Circuits Syst. II Express Briefs 53-II(7): 530-534 (2006) - [c5]Jing-Ying Chang, Chao-Chung Cheng, Shao-Yi Chien
Relative Depth Layer Extraction for Monoscopic Video by Use of Multidimensional Filter. ICME 2006: 221-224 - [c4]Chao-Chung Cheng, Chun-Wei Ku, Tian-Sheuan Chang:
A 1280×720 pixels 30 frames/s H.264/MPEG-4 AVC intra encoder. ISCAS 2006 - [c3]Yu-Jen Wang, Chao-Chung Cheng, Tian-Sheuan Chang:
A fast fractional pel motion estimation algorithm for H.264/MPEG-4 AVC. ISCAS 2006 - 2005
- [c2]Hao-Yun Chin, Chao-Chung Cheng, Yu-Kun Lin, Tian-Sheuan Chang:
A bandwidth efficient subsampling-based block matching architecture for motion estimation. ASP-DAC 2005: 7-8 - [c1]Chao-Chung Cheng, Tian-Sheuan Chang
Fast three step intra prediction algorithm for 4×4 blocks in H.264. ISCAS (2) 2005: 1509-1512
Coauthor Index
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