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Jan Vandenbussche
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2000 – 2009
- 2006
- [c10]Peter Spyns, Aldo de Moor, Jan Vandenbussche, Robert Meersman:
From Folksologies to Ontologies: How the Twain Meet. OTM Conferences (1) 2006: 738-755 - 2003
- [j4]Koen Uyttenhove, Jan Vandenbussche, Erik Lauwers, Georges G. E. Gielen
, Michiel S. J. Steyaert
Design techniques and implementation of an 8-bit 200-MS/s interpolating/averaging CMOS A/D converter. IEEE J. Solid State Circuits 38(3): 483-494 (2003) - 2002
- [j3]Geert Van der Plas, Jan Vandenbussche, Georges G. E. Gielen
A layout synthesis methodology for array-type analog blocks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(6): 645-661 (2002) - [c9]Jan Vandenbussche, Koen Uyttenhove, Erik Lauwers, Michel S. J. Steyaert
A 8-bit 200 MS/s interpolating/averaging CMOS A/D converter. CICC 2002: 445-448 - [c8]Jan Vandenbussche, Koen Uyttenhove, Erik Lauwers, Michiel Steyaert, Georges G. E. Gielen:
Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter. DAC 2002: 449-454 - [c7]Jan Vandenbussche, Erik Lauwers, Koen Uyttenhove, Michiel Steyaert
Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter. DATE 2002: 357-361 - 2001
- [j2]Geert Van der Plas
AMGIE-A synthesis environment for CMOS analog integrated circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(9): 1037-1058 (2001) - 2000
- [c6]Geert Van der Plas, Jan Vandenbussche, Walter Daems, Antal van den Bosch, Georges G. E. Gielen
Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter. DAC 2000: 452-457
1990 – 1999
- 1999
- [j1]Geert Van der Plas
A 14-bit intrinsic accuracy Q2 random walk CMOS DAC. IEEE J. Solid State Circuits 34(12): 1708-1718 (1999) - [c5]Geert Van der Plas
Statistical behavioral modeling for A/D-converters. ICECS 1999: 1713-1716 - 1998
- [c4]Anne Van den Bosch, Marc Borremans, Jan Vandenbussche, Geert Van der Plas
A 12 bit 200 MHz low glitch CMOS D/A converter. CICC 1998: 249-252 - [c3]Jan Vandenbussche, Geert Van der Plas, Georges G. E. Gielen
Behavioral model for D/A converters as VSI virtual components. CICC 1998: 473-476 - [c2]Geert Van der Plas, Jan Vandenbussche, Georges G. E. Gielen
Mondriaan: a tool for automated layout synthesis of array-type analog blocks. CICC 1998: 485-488 - [c1]Jan Vandenbussche, Stéphane Donnay, Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen:
Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon. DATE 1998: 716-720
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