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Thomas Nirschl
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2000 – 2009
- 2006
- [j3]Stephan Henzler, Georg Georgakos, Matthias Eireiner, Thomas Nirschl, Christian Pacha, Jörg Berthold, Doris Schmitt-Landsiedel:
Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead. IEEE J. Solid State Circuits 41(7): 1654-1661 (2006) - [c5]Christian Pacha, Klaus von Arnim, Thomas Schulz, Weize Xiong, Michael Gostkowski, Gerhard Knoblinger, Andrew Marshall, Thomas Nirschl, Jörg Berthold, Christian Russ, Harald Gossner, Charvaka Duvvury, Paul Patruno, C. Rinn Cleavelin, Klaus Schruefer:
Circuit design issues in multi-gate FET CMOS technologies. ISSCC 2006: 1656-1665 - 2005
- [c4]Stephan Henzler, Thomas Nirschl, Matthias Eireiner, Ettore Amirante, Doris Schmitt-Landsiedel:
Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuits. Conf. Computing Frontiers 2005: 414-420 - [c3]Jürgen Fischer, Ettore Amirante, Thomas Nirschl, Philip Teichmann, Stephan Henzler, Doris Schmitt-Landsiedel:
Impact of process parameter variations on the energy dissipation in adiabatic logic. ECCTD 2005: 429-432 - 2004
- [j2]Bernhard Wicht
, Thomas Nirschl, Doris Schmitt-Landsiedel:
Yield and speed optimization of a latch-type voltage sense amplifier. IEEE J. Solid State Circuits 39(7): 1148-1158 (2004) - [c2]Thomas Nirschl, Peng-Fei Wang, Walter Hansch, Doris Schmitt-Landsiedel:
The tunnelling field effect transistors (TFET): the temperature dependence, the simulation model, and its application. ISCAS (3) 2004: 713-716 - 2003
- [j1]Thomas Nirschl, M. Ostermayr, A. Olbrich, D. Vietzke, M. Omer, Carsten Linnenbank, U. Schaper, Y. Pottgiesser, J. Pottgiesser, M. Johansson:
MALTY--A memory test structure for analysis in the early phase of the technology development. Microelectron. Reliab. 43(9-11): 1383-1387 (2003) - [c1]Bernhard Wicht
A yield-optimized latch-type SRAM sense amplifier. ESSCIRC 2003: 409-412
Coauthor Index
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