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Zhihang Wu
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2020 – today
- 2024
- [c7]Celestino Sanches Martins, Abel Lorences-Riesgo, Sami Mumtaz, Trung-Hien Nguyen, Abir Hraghi, Zhihang Wu, Yann Frignac, Gabriel Charlet, Yu Zhao:
Frequency-Band Analysis of Equalization Enhanced Phase Noise Jointly with DSP Impact. OFC 2024: 1-3 - [c6]Trung-Hien Nguyen, Sami Mumtaz, Abel Lorences-Riesgo, Martí Sales-Llopis, Clement Jauffret, Celestino Sanches Martins, Zhihang Wu, Yann Frignac, Gabriel Charlet, Yu Zhao:
Carrier Frequency Offset Estimation Using Godard Timing Recovery in Coherent Optical Systems. OFC 2024: 1-3 - 2023
- [c5]Z. Zhang, Zhihang Wu, Christian Weis, Norbert Wehn, Mehdi Baradaran Tahoori:
A Learning-Based Approach for Single Event Transient Analysis in Pass Transistor Logic. IOLTS 2023: 1-7 - 2022
- [j1]Sanbao Su, Chang Meng
, Fan Yang
VECBEE: A Versatile Efficiency-Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 5085-5099 (2022) - [c4]Chang Meng
SEALS: sensitivity-driven efficient approximate logic synthesis. DAC 2022: 439-444 - [c3]Jan Lappas, André Lucas Chinazzo, Christian Weis, Chenyang Xia, Zhihang Wu, Leibin Ni
Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node. DATE 2022: 1083-1084 - [c2]Zhe Zhang, Jan Lappas, André Lucas Chinazzo, Christian Weis, Zhihang Wu, Leibin Ni
Machine learning based soft error rate estimation of pass transistor logic in high-speed communication. ETS 2022: 1-4 - [c1]André Lucas Chinazzo, Jan Lappas, Christian Weis, Qinhui Huang, Zhihang Wu, Leibin Ni
Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology. ICECS 2022 2022: 1-4
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last updated on 2024-08-05 20:22 CEST by the dblp team
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