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Kunhyuk Kang
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2010 – 2019
- 2010
- [j9]Ik Joon Chang, Jongsun Park
, Kunhyuk Kang, Kaushik Roy:
Fast and accurate estimation of SRAM read and hold failure probability using critical point sampling. IET Circuits Devices Syst. 4(6): 469-478 (2010) - [j8]Seung Hoon Choi, Kunhyuk Kang, Florentin Dartu, Kaushik Roy:
Timed Input Pattern Generation for an Accurate Delay Calculation Under Multiple Input Switching. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(3): 497-502 (2010) - [j7]Kunhyuk Kang, Sang Phill Park, Keejong Kim, Kaushik Roy:
On-Chip Variability Sensor Using Phase-Locked Loop for Detecting and Correcting Parametric Timing Failures. IEEE Trans. Very Large Scale Integr. Syst. 18(2): 270-280 (2010)
2000 – 2009
- 2009
- [j6]Sang Phill Park
Reliability Implications of Bias-Temperature Instability in Digital ICs. IEEE Des. Test Comput. 26(6): 8-17 (2009) - [j5]Jing Li
Variation Estimation and Compensation Technique in Scaled LTPS TFT Circuits for Low-Power Low-Cost Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(1): 46-59 (2009) - 2008
- [c13]Kunhyuk Kang, Saakshi Gangwal, Sang Phill Park, Kaushik Roy:
NBTI induced performance degradation in logic and memory circuits: how effectively can we approach a reliability solution? ASP-DAC 2008: 726-731 - 2007
- [j4]Bipul Chandra Paul, Kunhyuk Kang, Haldun Kufluoglu, Muhammad Ashraful Alam, Kaushik Roy:
Negative Bias Temperature Instability: Estimation and Design for Improved Reliability of Nanoscale Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(4): 743-751 (2007) - [j3]Kunhyuk Kang, Haldun Kufluoglu, Kaushik Roy, Muhammad Ashraful Alam:
Impact of Negative-Bias Temperature Instability in Nanoscale SRAM Array: Modeling and Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(10): 1770-1781 (2007) - [j2]Amit Agarwal, Kunhyuk Kang, Swarup Bhunia
Device-Aware Yield-Centric Dual-Vt Design Under Parameter Variations in Nanoscale Technologies. IEEE Trans. Very Large Scale Integr. Syst. 15(6): 660-671 (2007) - [c12]Jing Li
High Performance and Low Power Electronics on Flexible Substrate. DAC 2007: 274-275 - [c11]Kunhyuk Kang, Keejong Kim, Ahmad E. Islam, Muhammad Ashraful Alam, Kaushik Roy:
Characterization and Estimation of Circuit Reliability Degradation under NBTI using On-Line IDDQ Measurement. DAC 2007: 358-363 - [c10]Kunhyuk Kang, Keejong Kim, Kaushik Roy:
Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop. DAC 2007: 934-939 - [c9]Kunhyuk Kang, Sang Phill Park, Kaushik Roy, Muhammad Ashraful Alam:
Estimation of statistical variation in temporal NBTI degradation and its impact on lifetime circuit performance. ICCAD 2007: 730-734 - [c8]Kunhyuk Kang, Muhammad Ashraful Alam, Kaushik Roy:
Characterization of NBTI induced temporal performance degradation in nano-scale SRAM array using IDDQ. ITC 2007: 1-10 - 2006
- [j1]Kunhyuk Kang, Bipul C. Paul, Kaushik Roy:
Statistical timing analysis using levelized covariance propagation considering systematic and random variations of process parameters. ACM Trans. Design Autom. Electr. Syst. 11(4): 848-879 (2006) - [c7]Bipul Chandra Paul, Kunhyuk Kang, Haldun Kufluoglu, Muhammad Ashraful Alam, Kaushik Roy:
Temporal performance degradation under NBTI: estimation and design for improved reliability of nanoscale circuits. DATE 2006: 780-785 - [c6]Kunhyuk Kang, Haldun Kufluoglu, Muhammad Ashraful Alam, Kaushik Roy:
Efficient Transistor-Level Sizing Technique under Temporal Performance Degradation due to NBTI. ICCD 2006: 216-221 - 2005
- [c5]Ik Joon Chang, Kunhyuk Kang, Saibal Mukhopadhyay, Chris H. Kim, Kaushik Roy:
Fast and accurate estimation of nano-scaled SRAM read failure probability using critical point sampling. CICC 2005: 439-442 - [c4]Kunhyuk Kang, Bipul Chandra Paul, Kaushik Roy:
Statistical Timing Analysis using Levelized Covariance Propagation. DATE 2005: 764-769 - [c3]Amit Agarwal, Kunhyuk Kang, Kaushik Roy:
Accurate estimation and modeling of total chip leakage considering inter- & intra-die process variations. ICCAD 2005: 736-741 - [c2]Amit Agarwal, Kunhyuk Kang, Swarup Bhunia
Effectiveness of low power dual-Vt designs in nano-scale technologies under process parameter variations. ISLPED 2005: 14-19 - [c1]Saibal Mukhopadhyay, Kunhyuk Kang, Hamid Mahmoodi
Reliable and self-repairing SRAM in nano-scale technologies using leakage and delay monitoring. ITC 2005: 10
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