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Olesya Guz
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2010 – 2019
- 2013
- [c7]Wajeb Gharibi, Sergey A. Zaychenko, Farid Dahiri, Yu. V. Hahanova, Olesya Guz, Christopher Umerah Ngene, Adiele Stanley:
Synthesis of qubit models for logic circuits. EWDTS 2013: 1-7 - [c6]Vladimir Hahanov, Wajeb Gharibi, Baghdadi Ammar Awni Abbas, Svetlana Chumachenko, Olesya Guz, Eugenia Litvinova:
Cloud traffic monitoring and control. IDAACS 2013: 244-248 - 2011
- [c5]Vladimir Hahanov, Dong-Won Park, Olesya Guz, Aleksey Priymak:
Verification and diagnosis of SoC HDL-code. EWDTS 2011: 72-83 - [i2]Vladimir Hahanov, Eugenia Litvinova, Wajeb Gharibi, Olesya Guz:
Algebra-Logical Repair Method for FPGA Logic Blocks. CoRR abs/1105.1967 (2011) - [i1]Vladimir Hahanov, Wajeb Gharibi, Olesya Guz:
Brain-like infrastructure for embedded SoC diagnosis. CoRR abs/1105.1973 (2011) - 2010
- [c4]Vladimir Hahanov, Eugenia Litvinova, Wajeb Gharibi, Olesya Guz:
Coverage method for FPGA fault logic blocks by spares. EWDTS 2010: 51-56 - [c3]Vladimir Hahanov, Olesya Guz, Ngene Christopher Umerah, Vitaliy Olchovoy:
Process models for analyzing associative data structures. EWDTS 2010: 123-127
2000 – 2009
- 2008
- [c2]Vladimir Hahanov, Olesya Guz, Natalya Kulbakova, Maxim Davydov:
Vector-logical diagnosis method for SOC functionalities. EWDTS 2008: 159-162 - 2005
- [c1]Stanley Hyduke, Vladimir Hahanov, Volodymyr Obrizan, Olesya Guz:
PRUS - Processor Network for Digital Circuit Implementation. DSD 2005: 239-242
Coauthor Index
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