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Keun-Mok Kim
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- affiliation: KAIST, Yuseong-gu, Daejeon, South Korea
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2020 – today
- 2023
- [j8]Keun-Mok Kim
, Kyung-Sik Choi
A -124-dBm Sensitivity Interference-Resilient Direct-Conversion Duty-Cycled Wake-Up Receiver Achieving 0.114 mW at 1.966-s Wake-Up Latency. IEEE J. Solid State Circuits 58(6): 1667-1680 (2023) - 2022
- [j7]Kyung-Sik Choi
A 0.3-to-1-GHz IoT Transmitter Employing Pseudo-Randomized Phase Switching Modulator and Single-Supply Class-G Harmonic Rejection PA. IEEE J. Solid State Circuits 57(3): 892-905 (2022) - [j6]Kyung-Sik Choi
A Fully Integrated 490-GHz CMOS Receiver Adopting Dual-Locking Receiver-Based FLL. IEEE J. Solid State Circuits 57(9): 2626-2639 (2022) - [j5]Kyung-Sik Choi
A 915 MHz IoT Transmitter Employing Frequency Tripler and Digitally Controlled Duty-Cycle/Phase Calibration. IEEE J. Solid State Circuits 57(11): 3336-3347 (2022) - [j4]Hyunki Jung
CMOS Fractional-N Frequency Synthesizer for UHF RFID Reader Applications With Transformer-Based ISF Manipulation VCO. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4083-4087 (2022) - [c5]Keun-Mok Kim, Kyung-Sik Choi, Hyunki Jung, Byeonghun Yun, Subin Kim, Wonkab Oh, Eui-Soo Lee, Sujin Park, Eui-Rim Jeong, Jinho Ko, Sang-Gug Lee:
An LPWAN Radio with a Reconfigurable Data/Duty-Cycled-Wake-Up Receiver. ISSCC 2022: 404-406 - 2021
- [j3]Keun-Mok Kim
A Sub-nW Single-Supply 32-kHz Sub-Harmonic Pulse Injection Crystal Oscillator. IEEE J. Solid State Circuits 56(6): 1849-1858 (2021) - [j2]Keun-Mok Kim
A -123-dBm Sensitivity Split-Channel BFSK Reconfigurable Data/Wake-Up Receiver for Low-Power Wide-Area Networks. IEEE J. Solid State Circuits 56(9): 2656-2667 (2021) - [j1]Subin Kim
A Low-Noise and Fast-Settling UHF RFID Receiver With Digitally Controlled Leakage Cancellation. IEEE Trans. Circuits Syst. II Express Briefs 68(8): 2810-2814 (2021) - [c4]Keun-Mok Kim, Hyun-Gi Seok
0.6 V 8.1/0.2µW Ultra-Low-Power Logarithmic Power Detectors Employing Subthreshold MOS Transistors. A-SSCC 2021: 1-3 - 2020
- [c3]Kyung-Sik Choi, Keun-Mok Kim, Jinho Ko, Sang-Gug Lee:
A 5 dBm 30.6% Efficiency 915 MHz Transmitter with 210 μW ULP PLL Employing Frequency Tripler and Digitally Controlled Duty/Phase Calibration Buffer. A-SSCC 2020: 1-4 - [c2]Kyung-Sik Choi, Dzuhri Radityo Utomo, Keun-Mok Kim, Byeonghun Yun, Sang-Gug Lee, In-Young Lee:
29.7 A 490GHz 32mW Fully Integrated CMOS Receiver Adopting Dual-Locking FLL. ISSCC 2020: 452-454
2010 – 2019
- 2019
- [c1]Keun-Mok Kim, Eui-Rim Jeong, Kyung-Sik Choi, Subin Kim, Byeonghun Yun, Hyunki Jung, Wonkab Oh, Jinho Ko, Sang-Gug Lee:
A 915 MHz, 499 μW, -99 dBm, and 100 kbps BFSK Direct Conversion Receiver. ESSCIRC 2019: 209-212
Coauthor Index
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