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Danielle Duvalsaint
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2020 – today
- 2022
- [c6]Ruben Purdy, Danielle Duvalsaint, R. D. Shawn Blanton:
Secuirty Metrics for Logic Circuits. HOST 2022: 53-56 - [c5]Wei Li, Chris Nigh, Danielle Duvalsaint, Subhasish Mitra, Ronald D. Blanton:
PEPR: Pseudo-Exhaustive Physically-Aware Region Testing. ITC 2022: 314-323 - 2021
- [c4]Danielle Duvalsaint, R. D. Shawn Blanton:
Characterizing Corruptibility of Logic Locks using ATPG. ITC 2021: 213-222 - 2020
- [c3]Ayush Jain, Ujjwal Guin, M. Tanjidur Rahman, Navid Asadizanjani, Danielle Duvalsaint, R. D. Shawn Blanton:
Special Session: Novel Attacks on Logic-Locking. VTS 2020: 1-10 - [i1]Benjamin Tan
, Ramesh Karri, Nimisha Limaye, Abhrajit Sengupta, Ozgur Sinanoglu, Md. Moshiur Rahman, Swarup Bhunia, Danielle Duvalsaint, Ronald D. Blanton, Amin Rezaei, Yuanqi Shen, Hai Zhou, Leon Li, Alex Orailoglu, Zhaokun Han, Austin Benedetti, Luciano Brignone, Muhammad Yasin, Jeyavijayan Rajendran, Michael Zuzak, Ankur Srivastava, Ujjwal Guin, Chandan Karfa, Kanad Basu, Vivek V. Menon, Matthew French, Peilin Song, Franco Stellari, Gi-Joon Nam, Peter Gadfort, Alric Althoff, Joseph Tostenrude, Saverio Fazzari, Eric Breckenfeld, Kenneth Plaks:
Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking. CoRR abs/2006.06806 (2020)
2010 – 2019
- 2019
- [c2]Danielle Duvalsaint, Xiaoxiao Jin, Benjamin Niewenhuis, R. D. (Shawn) Blanton:
Characterization of Locked Combinational Circuits via ATPG. ITC 2019: 1-10 - [c1]Danielle Duvalsaint, Zeye Liu, Ananya Ravikumar, Ronald D. Blanton:
Characterization of Locked Sequential Circuits via ATPG. ITC-Asia 2019: 97-102
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