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Sarah L. Harris
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2020 – today
- 2021
- [c8]Sarah L. Harris, Daniel Chaver
, Luis Piñuel, José Ignacio Gómez Pérez
RVfpga: Using a RISC-V Core Targeted to an FPGA in Computer Architecture Education. FPL 2021: 145-150 - [c7]David M. Harris, Joshua Brake
A Digital Design and Computer Architecture MOOC. WCAE 2021: 1-6 - [c6]Sarah L. Harris, David M. Harris:
Digital Design and RISC-V Computer Architecture Textbook. WCAE 2021: 1-5
2010 – 2019
- 2019
- [c5]Jiong Si, Evangelos A. Yfantis, Sarah L. Harris:
A SS-CNN on an FPGA for Handwritten Digit Recognition. UEMCON 2019: 88-93 - 2018
- [j2]David V. Lee, Sarah L. Harris:
Linking Gait Dynamics to Mechanical Cost of Legged Locomotion. Frontiers Robotics AI 5: 111 (2018) - [c4]Jiong Si, Sarah L. Harris:
Handwritten digit recognition system on an FPGA. CCWC 2018: 402-407 - 2017
- [j1]Sarah L. Harris, David Money Harris, Daniel Chaver
MIPSfpga: using a commercial MIPS soft-core in computer architecture education. IET Circuits Devices Syst. 11(4): 283-291 (2017) - 2016
- [c3]Sarah L. Harris, Robert Owen, Enrique Sedano, Daniel A. Chaver Martinez
MIPSfpga: Hands-on learning on a commercial soft-core. EWME 2016: 1-5 - 2013
- [c2]David Money Harris, Sarah L. Harris:
Introductory digital design & computer architecture curriculum. MSE 2013: 14-16
2000 – 2009
- 2005
- [c1]Sarah L. Harris, David Money Harris:
Inexpensive Student-Assembled FPGA/Microcontroller Board. MSE 2005: 101-102
Coauthor Index
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last updated on 2024-04-25 05:55 CEST by the dblp team
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