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En-Yu Yang
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2020 – today
- 2024
- [c9]Maico Cassel dos Santos, Tianyu Jia, Joseph Zuckerman, Martin Cochet, Davide Giri, Erik Jens Loscalzo, Karthik Swaminathan, Thierry Tambe, Jeff Jun Zhang, Alper Buyuktosunoglu, Kuan-Lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca Piccolboni, Gabriele Tombesi, David Trilla, John-David Wellman, En-Yu Yang, Aporva Amarnath, Ying Jing, Bakshree Mishra, Joshua Park, Vignesh Suresh, Sarita V. Adve, Pradip Bose, David Brooks, Luca P. Carloni, Kenneth L. Shepard, Gu-Yeon Wei:
14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration. ISSCC 2024: 262-264 - 2023
- [j2]Thierry Tambe
, En-Yu Yang, Glenn G. Ko, Yuji Chai, Coleman Hooper
A 16-nm SoC for Noise-Robust Speech and NLP Edge AI Inference With Bayesian Sound Source Separation and Attention-Based DNNs. IEEE J. Solid State Circuits 58(2): 569-581 (2023) - [j1]Georgios Zacharopoulos
Trireme: Exploration of Hierarchical Multi-level Parallelism for Hardware Acceleration. ACM Trans. Embed. Comput. Syst. 22(3): 53:1-53:23 (2023) - 2022
- [c8]Tianyu Jia, En-Yu Yang, Yu-Shun Hsiao, Jonathan J. Cruz, David Brooks, Gu-Yeon Wei, Vijay Janapa Reddi:
OMU: A Probabilistic 3D Occupancy Mapping Accelerator for Real-time OctoMap at the Edge. DATE 2022: 909-914 - [i4]Georgios Zacharopoulos, Adel Ejjeh, Ying Jing, En-Yu Yang, Tianyu Jia, Iulian Brumar, Jeremy Intan, Muhammad Huzaifa, Sarita V. Adve, Vikram S. Adve, Gu-Yeon Wei, David Brooks:
Trireme: Exploring Hierarchical Multi-Level Parallelism for Domain Specific Hardware Acceleration. CoRR abs/2201.08603 (2022) - [i3]Tianyu Jia, En-Yu Yang, Yu-Shun Hsiao, Jonathan J. Cruz, David Brooks, Gu-Yeon Wei, Vijay Janapa Reddi:
OMU: A Probabilistic 3D Occupancy Mapping Accelerator for Real-time OctoMap at the Edge. CoRR abs/2205.03325 (2022) - 2021
- [c7]En-Yu Yang, Tianyu Jia, David Brooks, Gu-Yeon Wei:
FlexACC: A Programmable Accelerator with Application-Specific ISA for Flexible Deep Neural Network Inference. ASAP 2021: 266-273 - [c6]Thierry Tambe, En-Yu Yang, Glenn G. Ko, Yuji Chai, Coleman Hooper, Marco Donato, Paul N. Whatmough, Alexander M. Rush
SM6: A 16nm System-on-Chip for Accurate and Noise-Robust Attention-Based NLP Applications : The 33rd Hot Chips Symposium - August 22-24, 2021. HCS 2021: 1-13 - [c5]Thierry Tambe
9.8 A 25mm2 SoC for IoT Devices with 18ms Noise-Robust Speech-to-Text Latency via Bayesian Speech Denoising and Attention-Based Sequence-to-Sequence DNN Speech Recognition in 16nm FinFET. ISSCC 2021: 158-160 - [c4]Thierry Tambe
EdgeBERT: Sentence-Level Energy Optimizations for Latency-Aware Multi-Task NLP Inference. MICRO 2021: 830-844 - 2020
- [c3]Thierry Tambe
Algorithm-Hardware Co-Design of Adaptive Floating-Point Encodings for Resilient Deep Learning Inference. DAC 2020: 1-6 - [i2]Thierry Tambe, Coleman Hooper, Lillian Pentecost, En-Yu Yang, Marco Donato, Victor Sanh, Alexander M. Rush, David Brooks, Gu-Yeon Wei:
EdgeBERT: Optimizing On-Chip Inference for Multi-Task NLP. CoRR abs/2011.14203 (2020)
2010 – 2019
- 2019
- [i1]Thierry Tambe, En-Yu Yang, Zishen Wan
AdaptivFloat: A Floating-point based Data Type for Resilient Deep Learning Inference. CoRR abs/1909.13271 (2019) - 2018
- [c2]Wei-Hao Chen, Kai-Xiang Li, Wei-Yu Lin, Kuo-Hsiang Hsu, Pin-Yi Li, Cheng-Han Yang, Cheng-Xin Xue, En-Yu Yang, Yen-Kai Chen, Yun-Sheng Chang, Tzu-Hsiang Hsu, Ya-Chin King, Chorng-Jung Lin, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors. ISSCC 2018: 494-496 - [c1]Win-San Khwa, Jia-Jing Chen, Jia-Fang Li, Xin Si
A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors. ISSCC 2018: 496-498
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