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Chengying Chen
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2020 – today
- 2024
- [j15]Cong Wei
, Chengying Chen, Gongxing Huang, Lijie Huang, Renping Wang, Rongshan Wei
A 1.8 V 98.6 dB SNDR discrete-time CMOS delta-sigma ADC. Microelectron. J. 144: 106069 (2024) - 2023
- [j14]Yuanguo Zhou
An improved all-optical diffractive deep neural network with less parameters for gesture recognition. J. Vis. Commun. Image Represent. 90: 103688 (2023) - [j13]Qirui Ren, Qiang Huo, Zhisheng Chen, Qi Gao, Yiming Wang, Yiming Yang, Hao Wu, Xiangqu Fu, Xiaoxin Xu, Qing Luo, Jianfeng Gao, Chengying Chen, Xiaojin Zhao, Dengyun Lei, Xinghua Wang, Feng Zhang, Yong Chen, Pui-In Mak:
A Security-Enhanced, Charge-Pump-Free, ISO14443-A-/ISO10373-6-Compliant RFID Tag With 16.2-μW Embedded RRAM and Reconfigurable Strong PUF. IEEE Trans. Very Large Scale Integr. Syst. 31(2): 243-252 (2023) - [c12]Wenli Liao, Chengying Chen, Daifa Gao, Yufei Huang:
A 10Gbps High-Speed Low-Noise Optical Receiver Based on CMOS 45nm Technology. ASICON 2023: 1-4 - [c11]Weirong Xi, Jianhua Jiang, Chengying Chen:
A Fully-integrated Analog Front-end for Carbon-based Short-wave Infrared Image Sensor. ASICON 2023: 1-4 - 2022
- [j12]Qirui Ren, Chengying Chen, Danian Dong, Xiaoxin Xu, Yong Chen, Feng Zhang:
A 13 µW Analog Front-End with RRAM-Based Lowpass FIR Filter for EEG Signal Detection. Sensors 22(16): 6096 (2022) - [c10]Siting Chen, Xiao. Ma, Chengying Chen:
Design of X-Band 6-Bit Wideband Logic Control Phase Shifter. EEET 2022: 50-54 - 2020
- [j11]Chengying Chen
A Wide-Band High-Resolution Transmitter for Optical Isolation Amplifier. J. Electr. Comput. Eng. 2020: 3626401:1-3626401:8 (2020)
2010 – 2019
- 2019
- [j10]Chengying Chen, Liming Chen:
A 79-dB SNR 1.1-mW Fully Integrated Hearing Aid SoC. Circuits Syst. Signal Process. 38(7): 2893-2909 (2019) - [c9]Chengying Chen, Feng Zhang:
A 1-V, 82-dB SNR Analog Front-End with Peak-Statistics and Comparative-DWA Algorithm. ISCAS 2019: 1-4 - 2018
- [j9]Chengying Chen
A Mixed-Signal Programmable Time-Division Power-On-Reset and Volume Control Circuit for High-Resolution Hearing-Aid SoC Application. J. Electr. Comput. Eng. 2018: 1502749:1-1502749:7 (2018) - [j8]Chengying Chen, Liming Chen, Xinghua Wang, Feng Zhang:
A 0.6V, 8.4uW AFE circuit for biomedical signal recording. Microelectron. J. 75: 105-112 (2018) - [c8]Chengying Chen, Liming Chen, Xinghua Wang, Feng Zhang:
A 66-dB SNDR, 8-μW analog front-end for ECG/EEG recording application. ISCAS 2018: 1-4 - [c7]Yu-Chi Jiang, Xin Jie Cheam, Cheng-Ying Chen, Shu-Yu Kuo, Yao-Hsin Chou:
A Novel Portfolio Optimization with Short Selling Using GNQTS and Trend Ratio. SMC 2018: 1564-1569 - [c6]Feng Zhang, Dongyu Fan, Qi-Peng Lin, Qiang Huo, Yun Li, Lan Dai, Cheng-Ying Chen, Haihua Shen:
The application of non-volatile look-up-table operations based on multilevel-cell of resistance switching random access memory. VLSI-DAT 2018: 1-4 - 2017
- [j7]Jiangzheng Cai, Jia Yuan, Liming Chen, Chengying Chen, Yong Hei:
A PMOS read-port 8T SRAM cell with optimized leakage power and enhanced performance. IEICE Electron. Express 14(3): 20161188 (2017) - [j6]Kaifeng Xia, Bin Wu, Tao Xiong, Tian-Chun Ye, Cheng-Ying Chen:
A Hardware Efficient Multiple-Stream Pipeline FFT Processor for MIMO-OFDM Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(2): 592-601 (2017) - [j5]Kaifeng Xia, Bin Wu, Tao Xiong, Cheng-Ying Chen:
Design of a High-Throughput Sliding Block Viterbi Decoder for IEEE 802.11ac WLAN Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(8): 1606-1614 (2017) - [c5]Chengying Chen, Liming Chen, Xinghua Wang, Feng Zhang:
A 76μW, 58-dB SNDR analog front-end chip for implantable intraocular pressure detection. ASICON 2017: 171-174 - [c4]Chengying Chen, Liming Chen, Zhenli Lai:
A 58-dB SNDR 1.32-mW chopper-stabilized analog front-end for graphene hall element detecting application. ASICON 2017: 1009-1012 - [c3]Feng Zhang, Dongyu Fan, Yuan Duan, Jin Li, Cong Fang, Yun Li, Xiaowei Han, Lan Dai, Cheng-Ying Chen, Jinshun Bi, Ming Liu, Meng-Fan Chang:
A 130nm 1Mb HfOx embedded RRAM macro using self-adaptive peripheral circuit system techniques for 1.6X work temperature range. A-SSCC 2017: 173-176 - 2016
- [j4]Cheng-Ying Chen, Hongbin Sun, Haihua Shen, Feng Zhang:
A 128 Kb HfO2 ReRAM with Novel Double-Reference and Dynamic-Tracking scheme for write yield improvement. IEICE Electron. Express 13(6): 20160061 (2016) - [j3]Lan Dai, Cheng-Ying Chen
A 69-dB SNR 89-μW AGC for Multifrequency Signal Processing Based on Peak-Statistical Algorithm and Judgment Logic. VLSI Design 2016: 6708253:1-6708253:7 (2016) - [c2]Chengying Chen, Liming Chen, Jun Fan, Zenghui Yu, Jun Yang, Xiaoyu Hu, Yong Hei, Feng Zhang:
A 1V, 1.1mW mixed-signal hearing aid SoC in 0.13μm CMOS process. ISCAS 2016: 225-228 - 2015
- [j2]Cheng-Ying Chen, Jun Fan, Xiao-Yu Hu, Yong Hei:
A Low Power, High Performance Analog Front-End Circuit for 1 V Digital Hearing Aid SoC. Circuits Syst. Signal Process. 34(5): 1391-1404 (2015) - [j1]Liming Chen, Zenghui Yu, Chengying Chen, Xiaoyu Hu, Jun Fan, Jun Yang, Yong Hei:
A 1-V, 1.2-mA fully integrated SoC for digital hearing aids. Microelectron. J. 46(1): 12-19 (2015) - [c1]Feng Zhang, Hao Ju, Chengying Chen:
A PVT variation tolerant and low power 5Gb/s clock and data recovery circuit for PCI-E 2.0/USB 3.0. ASICON 2015: 1-4
Coauthor Index
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last updated on 2024-06-05 20:44 CEST by the dblp team
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