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Amirreza Yousefzadeh
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2020 – today
- 2024
- [j6]Leandro Mateus Giacomini Rocha, Refik Bilgic, Mohamed Naeim, Sudipta Das, Herman Oprins, Amirreza Yousefzadeh, Mario Konijnenburg, Dragomir Milojevic, James Myers, Julien Ryckaert, Dwaipayan Biswas:
Multidie 3-D Stacking of Memory Dominated Neuromorphic Architectures. IEEE Trans. Very Large Scale Integr. Syst. 32(11): 2144-2148 (2024) - [c19]Lucas Huijbregts, Hsiao-Hsuan Liu, Paul Detterer, Said Hamdioui, Amirreza Yousefzadeh, Rajendra Bishnoi:
Energy-efficient SNN Architecture using 3nm FinFET Multiport SRAM-based CIM with Online Learning. DAC 2024: 260:1-260:6 - [c18]Xabier Iturbe, Bernabé Linares-Barranco, Sio-Hoi Ieng, Arne Erdmann, Luca Peres, Oliver Rhodes, Rafael Tornero, Manolis Sifalakis, Marcel D. van de Burgwal, Amirreza Yousefzadeh, Maha Kooli, Riccardo Alidori, Pavel Zaykov:
Invited: Neuromorphic Vision Modalities in the NimbleAI 3D Chip. DAC 2024: 358:1-358:4 - [c17]Prithvish Nembhani, Kanishkan Vadivel, Guangzhi Tang, Mohammad Tahghighi, Gert-Jan van Schaik, Manolis Sifalakis, Zaid Al-Ars, Amirreza Yousefzadeh:
SENSIM: An Event-driven Parallel Simulator for Multi-core Neuromorphic Systems. IJCNN 2024: 1-6 - [c16]Alberto Patiño-Saucedo, Roy Meijer, Paul Detterer, Amirreza Yousefzadeh
, Laura Garrido-Regife, Bernabé Linares-Barranco, Manolis Sifalakis:
Co-optimized training of models with synaptic delays for digital neuromorphic accelerators. ISCAS 2024: 1-5 - [i9]Alberto Patiño-Saucedo, Roy Meijer, Amirreza Yousefzadeh
Hardware-aware training of models with synaptic delays for digital event-driven neuromorphic processors. CoRR abs/2404.10597 (2024) - [i8]Alexandra F. Dobrita, Amirreza Yousefzadeh, Simon Thorpe, Kanishkan Vadivel, Paul Detterer, Guangzhi Tang, Gert-Jan van Schaik, Mario Konijnenburg, Anteneh Gebregiorgis, Said Hamdioui, Manolis Sifalakis:
EON-1: A Brain-Inspired Processor for Near-Sensor Extreme Edge Online Feature Extraction. CoRR abs/2406.17285 (2024) - [i7]Cina Arjmand, Yingfu Xu, Kevin Shidqi, Alexandra F. Dobrita, Kanishkan Vadivel, Paul Detterer, Manolis Sifalakis, Amirreza Yousefzadeh, Guangzhi Tang:
TRIP: Trainable Region-of-Interest Prediction for Hardware-Efficient Neuromorphic Processing on Event-based Vision. CoRR abs/2406.17483 (2024) - [i6]Yingfu Xu, Guangzhi Tang, Amirreza Yousefzadeh, Guido de Croon, Manolis Sifalakis:
Event-based Optical Flow on Neuromorphic Processor: ANN vs. SNN Comparison based on Activation Sparsification. CoRR abs/2407.20421 (2024) - [i5]Roel Koopman, Amirreza Yousefzadeh, Mahyar Shahsavari, Guangzhi Tang, Manolis Sifalakis:
Overcoming the Limitations of Layer Synchronization in Spiking Neural Networks. CoRR abs/2408.05098 (2024) - 2023
- [c15]Alberto Patiño-Saucedo
Empirical study on the efficiency of Spiking Neural Networks with axonal delays, and algorithm-hardware benchmarking. ISCAS 2023: 1-5 - [c14]Guangzhi Tang, Ali Safa, Kevin Shidqi, Paul Detterer, Stefano Traferro, Mario Konijnenburg, Manolis Sifalakis
Open the box of digital neuromorphic processor: Towards effective algorithm-hardware co-design. ISCAS 2023: 1-5 - [i4]Guangzhi Tang, Ali Safa, Kevin Shidqi, Paul Detterer, Stefano Traferro, Mario Konijnenburg, Manolis Sifalakis, Gert-Jan van Schaik, Amirreza Yousefzadeh:
Open the box of digital neuromorphic processor: Towards effective algorithm-hardware co-design. CoRR abs/2303.15224 (2023) - [i3]Jason Yik, Soikat Hasan Ahmed, Zergham Ahmed, Brian Anderson, Andreas G. Andreou, Chiara Bartolozzi, Arindam Basu, Douwe den Blanken, Petrut Bogdan, Sander M. Bohté, Younes Bouhadjar, Sonia M. Buckley, Gert Cauwenberghs
NeuroBench: Advancing Neuromorphic Computing through Collaborative, Fair and Representative Benchmarking. CoRR abs/2304.04640 (2023) - [i2]Alberto Patiño-Saucedo, Amirreza Yousefzadeh, Guangzhi Tang, Federico Corradi, Bernabé Linares-Barranco, Manolis Sifalakis:
Empirical study on the efficiency of Spiking Neural Networks with axonal delays, and algorithm-hardware benchmarking. CoRR abs/2309.05345 (2023) - 2022
- [j5]Amirreza Yousefzadeh
Energy-efficient In-Memory Address Calculation. ACM Trans. Archit. Code Optim. 19(4): 52:1-52:16 (2022) - [c13]Amirreza Yousefzadeh, Gert-Jan van Schaik, Mohammad Tahghighi, Paul Detterer, Stefano Traferro, Martijn Hijdra, Jan Stuijt, Federico Corradi
SENeCA: Scalable Energy-efficient Neuromorphic Computer Architecture. AICAS 2022: 371-374 - [c12]Amirreza Yousefzadeh, Manolis Sifalakis
Delta Activation Layer exploits temporal sparsity for efficient embedded video processing. IJCNN 2022: 1-10 - 2021
- [i1]Amirreza Yousefzadeh, Manolis Sifalakis:
Training for temporal sparsity in deep neural networks, application in video processing. CoRR abs/2107.07305 (2021) - 2020
- [c11]Orlando Moreira, Amirreza Yousefzadeh, Fabian Chersi, Ajay Kapoor, Rik-Jan Zwartenkot, Peng Qiao, Gokturk Cinserin, Mina A. Khoei, Menno Lindwer, Jonathan Tapson:
NeuronFlow: A Hybrid Neuromorphic - Dataflow Processor Architecture for AI Workloads. AICAS 2020: 1-5 - [c10]Mina A. Khoei, Amirreza Yousefzadeh, Arash Pourtaherian, Orlando Moreira, Jonathan Tapson:
SpArNet: Sparse Asynchronous Neural Network execution for energy efficient inference. AICAS 2020: 256-260 - [c9]Orlando Moreira, Amirreza Yousefzadeh, Fabian Chersi, Gokturk Cinserin, Rik-Jan Zwartenkot, Ajay Kapoor, Peng Qiao, Peter Kievits, Mina A. Khoei, Louis Rouillard, Aimee Ferouge, Jonathan Tapson, Ashoka Visweswara:
NeuronFlow: a neuromorphic processor architecture for Live AI applications. DATE 2020: 840-845
2010 – 2019
- 2019
- [j4]Amirreza Yousefzadeh, Teresa Serrano-Gotarredona
Asynchronous Spiking Neurons, the Natural Key to Exploit Temporal Sparsity. IEEE J. Emerg. Sel. Topics Circuits Syst. 9(4): 668-678 (2019) - [c8]Amirreza Yousefzadeh, Sahar Hosseini, Priscila C. Holanda, Sam Leroux, Thilo Werner, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, Bart Dhoedt, Pieter Simoens
Conversion of Synchronous Artificial Neural Network to Asynchronous Spiking Neural Network using sigma-delta quantization. AICAS 2019: 81-85 - 2018
- [j3]Amirreza Yousefzadeh
Active Perception With Dynamic Vision Sensors. Minimum Saccades With Optimum Recognition. IEEE Trans. Biomed. Circuits Syst. 12(4): 927-939 (2018) - [c7]Amirreza Yousefzadeh, Garrick Orchard, Evangelos Stromatias, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco:
Hybrid Neural Network, An Efficient Low-Power Digital Hardware Implementation of Event-based Artificial Neural Network. ISCAS 2018: 1-5 - [c6]Amirreza Yousefzadeh, Mikel Soto, Teresa Serrano-Gotarredona, Francesco Galluppi
Performance Comparison of Time-Step-Driven versus Event-Driven Neural State Update Approaches in SpiNNaker. ISCAS 2018: 1-4 - 2017
- [j2]Amirreza Yousefzadeh, Miroslaw Jablonski, Taras Iakymchuk, Alejandro Linares-Barranco
On Multiple AER Handshaking Channels Over High-Speed Bit-Serial Bidirectional LVDS Links With Flow-Control and Clock-Correction on Commercial FPGAs for Scalable Neuromorphic Systems. IEEE Trans. Biomed. Circuits Syst. 11(5): 1133-1147 (2017) - [c5]Amirreza Yousefzadeh, Miroslaw Jablonski
Live demonstration: Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems. ISCAS 2017: 1 - [c4]Amirreza Yousefzadeh, Miroslaw Jablonski
Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems. ISCAS 2017: 1-4 - [c3]Amirreza Yousefzadeh, Timothée Masquelier
Live demonstration: Hardware implementation of convolutional STDP for on-line visual feature learning. ISCAS 2017: 1 - [c2]Amirreza Yousefzadeh, Timothée Masquelier
Hardware implementation of convolutional STDP for on-line visual feature learning. ISCAS 2017: 1-4 - 2016
- [j1]Amirreza Yousefzadeh, Luis A. Plana
Fast Predictive Handshaking in Synchronous FPGAs for Fully Asynchronous Multisymbol Chip Links: Application to SpiNNaker 2-of-7 Links. IEEE Trans. Circuits Syst. II Express Briefs 63-II(8): 763-767 (2016) - 2015
- [c1]Amirreza Yousefzadeh, Teresa Serrano-Gotarredona
Fast Pipeline 128×128 pixel spiking convolution core for event-driven vision processing in FPGAs. EBCCSP 2015: 1-8
Coauthor Index
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