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Erya Deng
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2020 – today
- 2024
- [j8]Lichuan Luo
, Erya Deng
CiTST-AdderNets: Computing in Toggle Spin Torques MRAM for Energy-Efficient AdderNets. IEEE Trans. Circuits Syst. I Regul. Pap. 71(3): 1130-1143 (2024) - 2022
- [j7]Linjun Jiang, Erya Deng, He Zhang
A Spintronic In-Memory Computing Network for Efficient Hamming Codec Implementation. IEEE Trans. Circuits Syst. II Express Briefs 69(4): 2086-2090 (2022) - 2021
- [c12]Rashid Ali, You Wang, Haoyuan Ma
A Reconfigurable Arbiter PUF Based on STT-MRAM. ISCAS 2021: 1-5 - [c11]Erya Deng, Wang Kang, Weisheng Zhao, Shaoqian Wei, You Wang, Deming Zhang:
Spin-Orbit Torque Nonvolatile Flip-Flop Designs. ISCAS 2021: 1-5 - [c10]Yan Huang, Erya Deng, Jinyu Bai, Qing Yang, Wang Kang, Biao Pan:
HSC: A Hybrid Spin/CMOS Logic Based In-Memory Engine with Area-Efficient Mapping Strategy. ISCAS 2021: 1-5 - [c9]Haoyuan Ma
SpinSim: A Computer Architecture-Level Variation Aware STT-MRAM Performance Evaluation Framework. ISCAS 2021: 1-5 - [c8]Deming Zhang, Xian Wang, Kaili Zhang, Lang Zeng, You Wang, Bi Wang, Erya Deng, Chuanjie Wang, Peng Wu, Youguang Zhang, Weisheng Zhao:
Fully Single Event Double Node Upset Tolerant Design for Magnetic Random Access Memory. ISCAS 2021: 1-5 - [c7]Xian Wang, Deming Zhang, Kaili Zhang, Erya Deng, You Wang, Weisheng Zhao:
A Novel Multi-Context Non-Volatile Content-Addressable Memory Cell and Multi-Level Architecture for High Reliability and Density. NVMSA 2021: 1-6
2010 – 2019
- 2019
- [j6]Chengzhi Wang
A Novel MTJ-Based Non-Volatile Ternary Content-Addressable Memory for High-Speed, Low-Power, and High-Reliable Search Operation. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(4): 1454-1464 (2019) - 2018
- [j5]Liuyang Zhang
A high-reliability and low-power computing-in-memory implementation within STT-MRAM. Microelectron. J. 81: 69-75 (2018) - [c6]He Zhang, Wang Kang, Zhaohao Wang, Erya Deng, Youguang Zhang, Weisheng Zhao:
High-Density and Fast-Configuration Non-Volatile Look-Up Table Based on NAND-Like Spintronic Memory. APCCAS 2018: 382-385 - [c5]Erya Deng, Zhaohao Wang, Wang Kang, Shaoqian Wei, Weisheng Zhao:
Multi-bit nonvolatile flip-flop based on NAND-like spin transfer torque MRAM. VLSI-SoC 2018: 184-187 - 2016
- [c4]Erya Deng, Lorena Anghel, Guillaume Prenat, Weisheng Zhao:
Multi-context non-volatile content addressable memory using magnetic tunnel junctions. NANOARCH 2016: 103-108 - 2015
- [j4]Erya Deng, Yue Zhang, Wang Kang, Bernard Dieny, Jacques-Olivier Klein
Synchronous 8-bit Non-Volatile Full-Adder based on Spin Transfer Torque Magnetic Tunnel Junction. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(7): 1757-1765 (2015) - [c3]Erya Deng, You Wang, Zhaohao Wang, Jacques-Olivier Klein
Robust magnetic full-adder with voltage sensing 2T/2MTJ cell. NANOARCH 2015: 27-32 - 2014
- [j3]You Wang, Yue Zhang, Erya Deng, Jacques-Olivier Klein
Compact model of magnetic tunnel junction with stochastic spin transfer torque switching for reliability analyses. Microelectron. Reliab. 54(9-10): 1774-1778 (2014) - [j2]Weisheng Zhao, Mathieu Moreau
Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(2): 443-454 (2014) - [j1]Djaafar Chabi, Weisheng Zhao, Erya Deng, Yue Zhang, Nesrine Ben Romdhane, Jacques-Olivier Klein
Ultra Low Power Magnetic Flip-Flop Based on Checkpointing/Power Gating and Self-Enable Mechanisms. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(6): 1755-1765 (2014) - 2013
- [c2]Jean-Michel Portal, Mathieu Moreau
Analytical study of complementary memristive synchronous logic gates. NANOARCH 2013: 70-75 - [c1]Yue Zhang, Erya Deng, Jacques-Olivier Klein
Synchronous full-adder based on complementary resistive switching memory cells. NEWCAS 2013: 1-4
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